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| author | Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> | 2015-01-16 09:09:49 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-29 12:00:50 -0500 |
| commit | d215b3e5e3e40235b5f644e5b66e2f16d110b117 (patch) | |
| tree | 7c674d6c78ae359a5f72470810caed704fae5699 | |
| parent | 03843da5d542b4516666434361c3a2211aa180ed (diff) | |
| download | u-boot-imx-d215b3e5e3e40235b5f644e5b66e2f16d110b117.zip u-boot-imx-d215b3e5e3e40235b5f644e5b66e2f16d110b117.tar.gz u-boot-imx-d215b3e5e3e40235b5f644e5b66e2f16d110b117.tar.bz2 | |
omap3: add SDRC settings for Samsung K4X51163PG
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/mem.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index 0b78c1c..3ce270c 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -249,6 +249,49 @@ enum { #define MICRON_RASWIDTH_200 14 #define MICRON_V_MCFG_200(size) MCFG((size), MICRON_RASWIDTH_200) +/* Samsung K4X51163PG - FGC6 (165MHz optimized) 6.06ns - from 2010.90 src */ +#define SAMSUNG_TDAL_165 5 +#define SAMSUNG_TDPL_165 2 +#define SAMSUNG_TRRD_165 2 +#define SAMSUNG_TRCD_165 3 +#define SAMSUNG_TRP_165 3 +#define SAMSUNG_TRAS_165 7 +#define SAMSUNG_TRC_165 10 +#define SAMSUNG_TRFC_165 12 + +#define SAMSUNG_V_ACTIMA_165 \ + ACTIM_CTRLA(SAMSUNG_TRFC_165, SAMSUNG_TRC_165, \ + SAMSUNG_TRAS_165, SAMSUNG_TRP_165, \ + SAMSUNG_TRCD_165, SAMSUNG_TRRD_165, \ + SAMSUNG_TDPL_165, SAMSUNG_TDAL_165) + +#define SAMSUNG_TWTR_165 1 +#define SAMSUNG_TCKE_165 2 +#define SAMSUNG_XSR_165 20 +#define SAMSUNG_TXP_165 5 + +#define SAMSUNG_V_ACTIMB_165 \ + ACTIM_CTRLB(SAMSUNG_TWTR_165, SAMSUNG_TCKE_165, \ + SAMSUNG_TXP_165, SAMSUNG_XSR_165) + +#define SAMSUNG_RASWIDTH_165 14 +#define SAMSUNG_V_MCFG_165(size) \ + V_MCFG_RASWIDTH(SAMSUNG_RASWIDTH_165) | V_MCFG_CASWIDTH_10B | \ + V_MCFG_ADDRMUXLEGACY_FLEX | V_MCFG_RAMSIZE(size) | \ + V_MCFG_BANKALLOCATION_RBC | V_MCFG_RAMTYPE_DDR + +/* TODO: find which register these were taken from */ + +#define SAMSUNG_BL_165 0x2 +#define SAMSUNG_SIL_165 0x0 +#define SAMSUNG_CASL_165 0x3 +#define SAMSUNG_WBST_165 0x0 +#define SAMSUNG_V_MR_165 ((SAMSUNG_WBST_165 << 9) | \ + (SAMSUNG_CASL_165 << 4) | (SAMSUNG_SIL_165 << 3) | \ + (SAMSUNG_BL_165)) + +#define SAMSUNG_SHARING 0x00003700 + /* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns */ #define NUMONYX_TDAL_165 6 /* Twr/Tck + Trp/tck */ /* 15/6 + 18/6 = 5.5 -> 6 */ |