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authorHeiko Schocher <hs@denx.de>2014-10-31 08:30:59 +0100
committerTom Rini <trini@ti.com>2014-11-17 08:47:16 -0500
commitbd1bb3c6a7364145fd781aeef56fa661e918f707 (patch)
treeeb62cfffa978a695f80c00a971e01ee8db11b1af
parent7dd5891061763b92e41a8e451a43be3d14ac9b4e (diff)
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arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE define
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
-rw-r--r--arch/arm/include/asm/arch-at91/atmel_mpddrc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-at91/atmel_mpddrc.h b/arch/arm/include/asm/arch-at91/atmel_mpddrc.h
index 5741f6e..130a85a 100644
--- a/arch/arm/include/asm/arch-at91/atmel_mpddrc.h
+++ b/arch/arm/include/asm/arch-at91/atmel_mpddrc.h
@@ -57,6 +57,7 @@ int ddr2_init(const unsigned int ram_address,
#define ATMEL_MPDDRC_CR_DIC_DS (0x1 << 8)
#define ATMEL_MPDDRC_CR_DIS_DLL (0x1 << 9)
#define ATMEL_MPDDRC_CR_OCD_DEFAULT (0x7 << 12)
+#define ATMEL_MPDDRC_CR_DQMS_SHARED (0x1 << 16)
#define ATMEL_MPDDRC_CR_ENRDM_ON (0x1 << 17)
#define ATMEL_MPDDRC_CR_NB_8BANKS (0x1 << 20)
#define ATMEL_MPDDRC_CR_NDQS_DISABLED (0x1 << 21)