mpc8xx: remove ESTEEM192E board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Conn Clark <clark@esteem.com>

11 files changed, 1 insertions, 1784 deletions

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 45e7d7e..428a129 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -10,9 +10,6 @@ choice
 config TARGET_COGENT_MPC8XX
 	bool "Support cogent_mpc8xx"
 
-config TARGET_ESTEEM192E
-	bool "Support ESTEEM192E"
-
 config TARGET_TQM823L
 	bool "Support TQM823L"
 
@@ -52,7 +49,6 @@ config TARGET_TQM885D
 endchoice
 
 source "board/cogent/Kconfig"
-source "board/esteem192e/Kconfig"
 source "board/tqc/tqm8xx/Kconfig"
 
 endmenu
diff --git a/board/esteem192e/Kconfig b/board/esteem192e/Kconfig
deleted file mode 100644
index f895bc4..0000000
--- a/board/esteem192e/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_ESTEEM192E
-
-config SYS_BOARD
-	default "esteem192e"
-
-config SYS_CONFIG_NAME
-	default "ESTEEM192E"
-
-endif
diff --git a/board/esteem192e/MAINTAINERS b/board/esteem192e/MAINTAINERS
deleted file mode 100644
index 8d6634c..0000000
--- a/board/esteem192e/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-ESTEEM192E BOARD
-M:	Conn Clark <clark@esteem.com>
-S:	Maintained
-F:	board/esteem192e/
-F:	include/configs/ESTEEM192E.h
-F:	configs/ESTEEM192E_defconfig
diff --git a/board/esteem192e/Makefile b/board/esteem192e/Makefile
deleted file mode 100644
index 55d80b6..0000000
--- a/board/esteem192e/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= esteem192e.o flash.o
diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c
deleted file mode 100644
index b54c614..0000000
--- a/board/esteem192e/esteem192e.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Modified By Conn Clark to work with Esteem 192E 7/31/00
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-#define	_NOT_USED_	0xFFFFFFFF
-
-const uint sdram_table[] = {
-	/*
-	 * Single Read. (Offset 0 in UPMA RAM)
-	 *
-	 * active, NOP, read, precharge, NOP */
-	0x0F27CC04, 0x0EAECC04, 0x00B98C04, 0x00F74C00,
-	0x11FFCC05,		/* last */
-	/*
-	 * SDRAM Initialization (offset 5 in UPMA RAM)
-	 *
-	 * This is no UPM entry point. The following definition uses
-	 * the remaining space to establish an initialization
-	 * sequence, which is executed by a RUN command.
-	 * NOP, Program
-	 */
-	0x0F0A8C34, 0x1F354C37,	/* last */
-
-	_NOT_USED_,		/* Not used */
-
-	/*
-	 * Burst Read. (Offset 8 in UPMA RAM)
-	 * active, NOP, read, NOP, NOP, NOP, NOP, NOP */
-	0x0F37CC04, 0x0EFECC04, 0x00FDCC04, 0x00FFCC00,
-	0x00FFCC00, 0x01FFCC00, 0x0FFFCC00, 0x1FFFCC05,	/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/*
-	 * Single Write. (Offset 18 in UPMA RAM)
-	 * active, NOP, write, NOP, precharge, NOP */
-	0x0F27CC04, 0x0EAE8C00, 0x01BD4C04, 0x0FFB8C04,
-	0x0FF74C04, 0x1FFFCC05,	/* last */
-	_NOT_USED_, _NOT_USED_,
-	/*
-	 * Burst Write. (Offset 20 in UPMA RAM)
-	 * active, NOP, write, NOP, NOP, NOP, NOP, NOP */
-	0x0F37CC04, 0x0EFE8C00, 0x00FD4C00, 0x00FFCC00,
-	0x00FFCC00, 0x01FFCC04, 0x0FFFCC04, 0x1FFFCC05,	/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/*
-	 * Refresh  (Offset 30 in UPMA RAM)
-	 * precharge, NOP, auto_ref, NOP, NOP, NOP */
-	0x0FF74C34, 0x0FFACCB4, 0x0FF5CC34, 0x0FFFCC34,
-	0x0FFFCCB4, 0x1FFFCC35,	/* last */
-	_NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/*
-	 * Exception. (Offset 3c in UPMA RAM)
-	 */
-	0x0FFB8C00, 0x1FF74C03,	/* last */
-	_NOT_USED_, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
-	puts ("Board: Esteem 192E\n");
-	return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size_b0, size_b1;
-
-	/*
-	 * Explain frequency of refresh here
-	 */
-
-	memctl->memc_mptpr = 0x0200;	/* divide by 32 */
-
-	memctl->memc_mamr = 0x18003112;	/*CONFIG_SYS_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
-
-	upmconfig (UPMA, (uint *) sdram_table,
-		   sizeof (sdram_table) / sizeof (uint));
-
-	/*
-	 * Map cs 2 and 3 to the SDRAM banks 0 and 1 at
-	 * preliminary addresses - these have to be modified after the
-	 * SDRAM size has been determined.
-	 */
-
-	memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM;	/* not defined yet */
-	memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;
-
-	memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
-	memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
-
-
-	/* perform SDRAM initializsation sequence */
-	memctl->memc_mar = 0x00000088;
-	memctl->memc_mcr = 0x80004830;	/* SDRAM bank 0 execute 8 refresh */
-	memctl->memc_mcr = 0x80004105;	/* SDRAM bank 0 */
-
-	memctl->memc_mcr = 0x80006830;	/* SDRAM bank 1 execute 8 refresh */
-	memctl->memc_mcr = 0x80006105;	/* SDRAM bank 1 */
-
-	memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;	/* 0x18803112  start refresh timer TODO: explain here */
-
-/* printf ("banks 0 and 1 are programed\n"); */
-
-	/*
-	 * Check Bank 0 Memory Size for re-configuration
-	 *
-	 */
-	size_b0 = get_ram_size ( (long *)SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE);
-	size_b1 = get_ram_size ( (long *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);
-
-	printf ("\nbank 0 size %lu\nbank 1 size %lu\n", size_b0, size_b1);
-
-/* printf ("bank 1 size %u\n",size_b1); */
-
-	if (size_b1 == 0) {
-		/*
-		 * Adjust refresh rate if bank 0 isn't stuffed
-		 */
-		memctl->memc_mptpr = 0x0400;	/* divide by 64 */
-		memctl->memc_br3 &= 0x0FFFFFFFE;
-
-		/*
-		 * Adjust OR2 for size of bank 0
-		 */
-		memctl->memc_or2 |= 7 * size_b0;
-	} else {
-		if (size_b0 < size_b1) {
-			memctl->memc_br2 &= 0x00007FFE;
-			memctl->memc_br3 &= 0x00007FFF;
-
-			/*
-			 * Adjust OR3 for size of bank 1
-			 */
-			memctl->memc_or3 |= 15 * size_b1;
-
-			/*
-			 * Adjust OR2 for size of bank 0
-			 */
-			memctl->memc_or2 |= 15 * size_b0;
-			memctl->memc_br2 += (size_b1 + 1);
-		} else {
-			memctl->memc_br3 &= 0x00007FFE;
-
-			/*
-			 * Adjust OR2 for size of bank 0
-			 */
-			memctl->memc_or2 |= 15 * size_b0;
-
-			/*
-			 * Adjust OR3 for size of bank 1
-			 */
-			memctl->memc_or3 |= 15 * size_b1;
-			memctl->memc_br3 += (size_b0 + 1);
-		}
-	}
-
-	/* before leaving set all unused i/o pins to outputs */
-
-	/*
-	 *      --*Unused Pin List*--
-	 *
-	 * group/port           bit number
-	 * IP_B                 0,1,3,4,5  Taken care of in pcmcia-cs-x.x.xx
-	 * PA                   5,7,8,9,14,15
-	 * PB                   22,23,31
-	 * PC                   4,5,6,7,10,11,12,13,14,15
-	 * PD                   5,6,7
-	 *
-	 */
-
-	/*
-	 *   --*Pin Used for I/O List*--
-	 *
-	 * port     input bit number    output bit number    either
-	 * PB                           18,26,27
-	 * PD       3,4                                      8,9,10,11,12,13,14,15
-	 *
-	 */
-
-	immap->im_ioport.iop_papar &= ~0x05C3;	/* set pins as io */
-	immap->im_ioport.iop_padir |= 0x05C3;	/* set pins as output */
-	immap->im_ioport.iop_paodr &= 0x0008;	/* config pins 9 & 14 as normal outputs */
-	immap->im_ioport.iop_padat |= 0x05C3;	/* set unused pins as high */
-
-	immap->im_cpm.cp_pbpar &= ~0x00001331;	/* set unused port b pins as io */
-	immap->im_cpm.cp_pbdir |= 0x00001331;	/* set unused port b pins as output */
-	immap->im_cpm.cp_pbodr &= ~0x00001331;	/* config bits 18,22,23,26,27 & 31 as normal outputs */
-	immap->im_cpm.cp_pbdat |= 0x00001331;	/* set T/E LED, /NV_CS, & /POWER_ADJ_CS and the rest to a high */
-
-	immap->im_ioport.iop_pcpar &= ~0x0F3F;	/* set unused port c pins as io */
-	immap->im_ioport.iop_pcdir |= 0x0F3F;	/* set unused port c pins as output */
-	immap->im_ioport.iop_pcso &= ~0x0F3F;	/* clear special purpose bit for unused port c pins for clarity */
-	immap->im_ioport.iop_pcdat |= 0x0F3F;	/* set unused port c pins high */
-
-	immap->im_ioport.iop_pdpar &= 0xE000;	/* set pins as io */
-	immap->im_ioport.iop_pddir &= 0xE000;	/* set bit 3 & 4 as inputs */
-	immap->im_ioport.iop_pddir |= 0x07FF;	/* set bits 5 - 15 as outputs */
-	immap->im_ioport.iop_pddat = 0x0055;	/* set alternating pattern on test port */
-
-	return (size_b0 + size_b1);
-}
diff --git a/board/esteem192e/flash.c b/board/esteem192e/flash.c
deleted file mode 100644
index a121104..0000000
--- a/board/esteem192e/flash.c
+++ /dev/null
@@ -1,1119 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips        */
-
-#ifdef CONFIG_FLASH_16BIT
-#define FLASH_WORD_SIZE	unsigned short
-#define	FLASH_ID_MASK	0xFFFF
-#else
-#define FLASH_WORD_SIZE unsigned long
-#define	FLASH_ID_MASK	0xFFFFFFFF
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info);
-
-#ifndef CONFIG_FLASH_16BIT
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-#else
-static int write_short (flash_info_t * info, ulong dest, ushort data);
-#endif
-/*int flash_write (uchar *, ulong, ulong); */
-/*flash_info_t *addr2info (ulong);   */
-
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	unsigned long size_b0, size_b1;
-	int i;
-
-	/* Init: no FLASHes known */
-	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	/* Static FLASH Bank configuration here - FIXME XXX */
-
-	size_b0 =
-		flash_get_size ((volatile FLASH_WORD_SIZE *)
-				FLASH_BASE0_PRELIM, &flash_info[0]);
-	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0 << 20);
-	}
-
-	size_b1 =
-		flash_get_size ((volatile FLASH_WORD_SIZE *)
-				FLASH_BASE1_PRELIM, &flash_info[1]);
-
-	if (size_b1 > size_b0) {
-		printf ("## ERROR: "
-			"Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
-			size_b1, size_b1 << 20, size_b0, size_b0 << 20);
-		flash_info[0].flash_id = FLASH_UNKNOWN;
-		flash_info[1].flash_id = FLASH_UNKNOWN;
-		flash_info[0].sector_count = -1;
-		flash_info[1].sector_count = -1;
-		flash_info[0].size = 0;
-		flash_info[1].size = 0;
-		return (0);
-	}
-
-	/* Remap FLASH according to real size */
-	memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
-	memctl->memc_br0 = CONFIG_SYS_FLASH_BASE | 0x00000801;	/*  (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; */
-
-	/* Re-do sizing to get full correct info */
-
-	size_b0 = flash_get_size ((volatile FLASH_WORD_SIZE *) CONFIG_SYS_FLASH_BASE,
-				  &flash_info[0]);
-	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-	/* monitor protection ON by default */
-	(void) flash_protect (FLAG_PROTECT_SET,
-			      CONFIG_SYS_MONITOR_BASE,
-			      CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-			      &flash_info[0]);
-#endif
-
-	if (size_b1) {
-		memctl->memc_or1 =
-			CONFIG_SYS_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
-		memctl->memc_br1 =
-			(CONFIG_SYS_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK);
-		/*((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) |
-		   BR_MS_GPCM | BR_V; */
-
-		/* Re-do sizing to get full correct info */
-		size_b1 =
-			flash_get_size ((volatile FLASH_WORD_SIZE
-					 *) (CONFIG_SYS_FLASH_BASE + size_b0),
-					&flash_info[1]);
-
-		flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-		/* monitor protection ON by default */
-		(void) flash_protect (FLAG_PROTECT_SET,
-				      CONFIG_SYS_MONITOR_BASE,
-				      CONFIG_SYS_MONITOR_BASE + monitor_flash_len -
-				      1, &flash_info[1]);
-#endif
-	} else {
-		memctl->memc_br1 = 0;	/* invalidate bank */
-
-		flash_info[1].flash_id = FLASH_UNKNOWN;
-		flash_info[1].sector_count = -1;
-	}
-
-	flash_info[0].size = size_b0;
-	flash_info[1].size = size_b1;
-
-	return (size_b0 + size_b1);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
-	int i;
-
-	/* set up sector start adress table */
-	if (info->flash_id & FLASH_BTYPE) {
-		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00004000;
-			info->start[2] = base + 0x00008000;
-			info->start[3] = base + 0x0000C000;
-			info->start[4] = base + 0x00010000;
-			info->start[5] = base + 0x00014000;
-			info->start[6] = base + 0x00018000;
-			info->start[7] = base + 0x0001C000;
-			for (i = 8; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00020000) - 0x000E0000;
-			}
-		} else {
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00008000;
-			info->start[2] = base + 0x0000C000;
-			info->start[3] = base + 0x00010000;
-			for (i = 4; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00020000) - 0x00060000;
-			}
-		}
-#else
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00002000;
-			info->start[2] = base + 0x00004000;
-			info->start[3] = base + 0x00006000;
-			info->start[4] = base + 0x00008000;
-			info->start[5] = base + 0x0000A000;
-			info->start[6] = base + 0x0000C000;
-			info->start[7] = base + 0x0000E000;
-			for (i = 8; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00010000) - 0x00070000;
-			}
-		} else {
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00004000;
-			info->start[2] = base + 0x00006000;
-			info->start[3] = base + 0x00008000;
-			for (i = 4; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00010000) - 0x00030000;
-			}
-		}
-#endif
-	} else {
-		/* set sector offsets for top boot block type           */
-		i = info->sector_count - 1;
-		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00008000;
-			info->start[i--] = base + info->size - 0x0000C000;
-			info->start[i--] = base + info->size - 0x00010000;
-			info->start[i--] = base + info->size - 0x00014000;
-			info->start[i--] = base + info->size - 0x00018000;
-			info->start[i--] = base + info->size - 0x0001C000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00020000;
-			}
-
-		} else {
-
-			info->start[i--] = base + info->size - 0x00008000;
-			info->start[i--] = base + info->size - 0x0000C000;
-			info->start[i--] = base + info->size - 0x00010000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00020000;
-			}
-		}
-#else
-			info->start[i--] = base + info->size - 0x00002000;
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00006000;
-			info->start[i--] = base + info->size - 0x00008000;
-			info->start[i--] = base + info->size - 0x0000A000;
-			info->start[i--] = base + info->size - 0x0000C000;
-			info->start[i--] = base + info->size - 0x0000E000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00010000;
-			}
-
-		} else {
-
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00006000;
-			info->start[i--] = base + info->size - 0x00008000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00010000;
-			}
-		}
-#endif
-	}
-
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
-	int i;
-	uchar *boottype;
-	uchar botboot[] = ", bottom boot sect)\n";
-	uchar topboot[] = ", top boot sector)\n";
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		return;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_AMD:
-		printf ("AMD ");
-		break;
-	case FLASH_MAN_FUJ:
-		printf ("FUJITSU ");
-		break;
-	case FLASH_MAN_SST:
-		printf ("SST ");
-		break;
-	case FLASH_MAN_STM:
-		printf ("STM ");
-		break;
-	case FLASH_MAN_INTEL:
-		printf ("INTEL ");
-		break;
-	default:
-		printf ("Unknown Vendor ");
-		break;
-	}
-
-	if (info->flash_id & 0x0001) {
-		boottype = botboot;
-	} else {
-		boottype = topboot;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_AM400B:
-		printf ("AM29LV400B (4 Mbit%s", boottype);
-		break;
-	case FLASH_AM400T:
-		printf ("AM29LV400T (4 Mbit%s", boottype);
-		break;
-	case FLASH_AM800B:
-		printf ("AM29LV800B (8 Mbit%s", boottype);
-		break;
-	case FLASH_AM800T:
-		printf ("AM29LV800T (8 Mbit%s", boottype);
-		break;
-	case FLASH_AM160B:
-		printf ("AM29LV160B (16 Mbit%s", boottype);
-		break;
-	case FLASH_AM160T:
-		printf ("AM29LV160T (16 Mbit%s", boottype);
-		break;
-	case FLASH_AM320B:
-		printf ("AM29LV320B (32 Mbit%s", boottype);
-		break;
-	case FLASH_AM320T:
-		printf ("AM29LV320T (32 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL800B:
-		printf ("INTEL28F800B (8 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL800T:
-		printf ("INTEL28F800T (8 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL160B:
-		printf ("INTEL28F160B (16 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL160T:
-		printf ("INTEL28F160T (16 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL320B:
-		printf ("INTEL28F320B (32 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL320T:
-		printf ("INTEL28F320T (32 Mbit%s", boottype);
-		break;
-
-#if 0				/* enable when devices are available */
-
-	case FLASH_INTEL640B:
-		printf ("INTEL28F640B (64 Mbit%s", boottype);
-		break;
-	case FLASH_INTEL640T:
-		printf ("INTEL28F640T (64 Mbit%s", boottype);
-		break;
-#endif
-
-	default:
-		printf ("Unknown Chip Type\n");
-		break;
-	}
-
-	printf ("  Size: %ld MB in %d Sectors\n",
-		info->size >> 20, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-	for (i = 0; i < info->sector_count; ++i) {
-		if ((i % 5) == 0)
-			printf ("\n   ");
-		printf (" %08lX%s",
-			info->start[i], info->protect[i] ? " (RO)" : "     ");
-	}
-	printf ("\n");
-	return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info)
-{
-	short i;
-	ulong base = (ulong) addr;
-	FLASH_WORD_SIZE value;
-
-	/* Write auto select command: read Manufacturer ID */
-
-
-#ifndef CONFIG_FLASH_16BIT
-
-	/*
-	 * Note: if it is an AMD flash and the word at addr[0000]
-	 * is 0x00890089 this routine will think it is an Intel
-	 * flash device and may(most likely) cause trouble.
-	 */
-
-	addr[0x0000] = 0x00900090;
-	if (addr[0x0000] != 0x00890089) {
-		addr[0x0555] = 0x00AA00AA;
-		addr[0x02AA] = 0x00550055;
-		addr[0x0555] = 0x00900090;
-#else
-
-	/*
-	 * Note: if it is an AMD flash and the word at addr[0000]
-	 * is 0x0089 this routine will think it is an Intel
-	 * flash device and may(most likely) cause trouble.
-	 */
-
-	addr[0x0000] = 0x0090;
-
-	if (addr[0x0000] != 0x0089) {
-		addr[0x0555] = 0x00AA;
-		addr[0x02AA] = 0x0055;
-		addr[0x0555] = 0x0090;
-#endif
-	}
-	value = addr[0];
-
-	switch (value) {
-	case (AMD_MANUFACT & FLASH_ID_MASK):
-		info->flash_id = FLASH_MAN_AMD;
-		break;
-	case (FUJ_MANUFACT & FLASH_ID_MASK):
-		info->flash_id = FLASH_MAN_FUJ;
-		break;
-	case (STM_MANUFACT & FLASH_ID_MASK):
-		info->flash_id = FLASH_MAN_STM;
-		break;
-	case (SST_MANUFACT & FLASH_ID_MASK):
-		info->flash_id = FLASH_MAN_SST;
-		break;
-	case (INTEL_MANUFACT & FLASH_ID_MASK):
-		info->flash_id = FLASH_MAN_INTEL;
-		break;
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		info->sector_count = 0;
-		info->size = 0;
-		return (0);	/* no or unknown flash  */
-
-	}
-
-	value = addr[1];	/* device ID            */
-
-	switch (value) {
-
-	case (AMD_ID_LV400T & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM400T;
-		info->sector_count = 11;
-		info->size = 0x00100000;
-		break;		/* => 1 MB              */
-
-	case (AMD_ID_LV400B & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM400B;
-		info->sector_count = 11;
-		info->size = 0x00100000;
-		break;		/* => 1 MB              */
-
-	case (AMD_ID_LV800T & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM800T;
-		info->sector_count = 19;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
-
-	case (AMD_ID_LV800B & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM800B;
-		info->sector_count = 19;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
-
-	case (AMD_ID_LV160T & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM160T;
-		info->sector_count = 35;
-		info->size = 0x00400000;
-		break;		/* => 4 MB              */
-
-	case (AMD_ID_LV160B & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM160B;
-		info->sector_count = 35;
-		info->size = 0x00400000;
-		break;		/* => 4 MB              */
-#if 0				/* enable when device IDs are available */
-	case (AMD_ID_LV320T & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM320T;
-		info->sector_count = 67;
-		info->size = 0x00800000;
-		break;		/* => 8 MB              */
-
-	case (AMD_ID_LV320B & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM320B;
-		info->sector_count = 67;
-		info->size = 0x00800000;
-		break;		/* => 8 MB              */
-#endif
-
-	case (INTEL_ID_28F800B3T & FLASH_ID_MASK):
-		info->flash_id += FLASH_INTEL800T;
-		info->sector_count = 23;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
-
-	case (INTEL_ID_28F800B3B & FLASH_ID_MASK):
-		info->flash_id += FLASH_INTEL800B;
-		info->sector_count = 23;
-		info->size = 0x00200000;
-		break;		/* => 2 MB              */
-
-	case (INTEL_ID_28F160B3T & FLASH_ID_MASK):
-		info->flash_id += FLASH_INTEL160T;
-		info->sector_count = 39;
-		info->size = 0x00400000;
-		break;		/* => 4 MB              */
-
-	case (INTEL_ID_28F160B3B & FLASH_ID_MASK):
-		info->flash_id += FLASH_INTEL160B;
-		info->sector_count = 39;
-		info->size = 0x00400000;
-		break;		/* => 4 MB              */
-
-	case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
-		info->flash_id += FLASH_INTEL320T;
-		info->sector_count = 71;
-		info->size = 0x00800000;
-		break;		/* => 8 MB              */
-
-	case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM320B;
-		info->sector_count = 71;
-		info->size = 0x00800000;
-		break;		/* => 8 MB              */
-
-#if 0				/* enable when devices are available */
-	case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
-		info->flash_id += FLASH_INTEL320T;
-		info->sector_count = 135;
-		info->size = 0x01000000;
-		break;		/* => 16 MB             */
-
-	case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
-		info->flash_id += FLASH_AM320B;
-		info->sector_count = 135;
-		info->size = 0x01000000;
-		break;		/* => 16 MB             */
-#endif
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		return (0);	/* => no or unknown flash */
-
-	}
-
-	/* set up sector start adress table */
-	if (info->flash_id & FLASH_BTYPE) {
-		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00004000;
-			info->start[2] = base + 0x00008000;
-			info->start[3] = base + 0x0000C000;
-			info->start[4] = base + 0x00010000;
-			info->start[5] = base + 0x00014000;
-			info->start[6] = base + 0x00018000;
-			info->start[7] = base + 0x0001C000;
-			for (i = 8; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00020000) - 0x000E0000;
-			}
-		} else {
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00008000;
-			info->start[2] = base + 0x0000C000;
-			info->start[3] = base + 0x00010000;
-			for (i = 4; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00020000) - 0x00060000;
-			}
-		}
-#else
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00002000;
-			info->start[2] = base + 0x00004000;
-			info->start[3] = base + 0x00006000;
-			info->start[4] = base + 0x00008000;
-			info->start[5] = base + 0x0000A000;
-			info->start[6] = base + 0x0000C000;
-			info->start[7] = base + 0x0000E000;
-			for (i = 8; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00010000) - 0x00070000;
-			}
-		} else {
-			/* set sector offsets for bottom boot block type        */
-			info->start[0] = base + 0x00000000;
-			info->start[1] = base + 0x00004000;
-			info->start[2] = base + 0x00006000;
-			info->start[3] = base + 0x00008000;
-			for (i = 4; i < info->sector_count; i++) {
-				info->start[i] =
-					base + (i * 0x00010000) - 0x00030000;
-			}
-		}
-#endif
-	} else {
-		/* set sector offsets for top boot block type           */
-		i = info->sector_count - 1;
-		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CONFIG_FLASH_16BIT
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00008000;
-			info->start[i--] = base + info->size - 0x0000C000;
-			info->start[i--] = base + info->size - 0x00010000;
-			info->start[i--] = base + info->size - 0x00014000;
-			info->start[i--] = base + info->size - 0x00018000;
-			info->start[i--] = base + info->size - 0x0001C000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00020000;
-			}
-
-		} else {
-
-			info->start[i--] = base + info->size - 0x00008000;
-			info->start[i--] = base + info->size - 0x0000C000;
-			info->start[i--] = base + info->size - 0x00010000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00020000;
-			}
-		}
-#else
-			info->start[i--] = base + info->size - 0x00002000;
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00006000;
-			info->start[i--] = base + info->size - 0x00008000;
-			info->start[i--] = base + info->size - 0x0000A000;
-			info->start[i--] = base + info->size - 0x0000C000;
-			info->start[i--] = base + info->size - 0x0000E000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00010000;
-			}
-
-		} else {
-
-			info->start[i--] = base + info->size - 0x00004000;
-			info->start[i--] = base + info->size - 0x00006000;
-			info->start[i--] = base + info->size - 0x00008000;
-			for (; i >= 0; i--) {
-				info->start[i] = base + i * 0x00010000;
-			}
-		}
-#endif
-	}
-
-	/* check for protected sectors */
-	for (i = 0; i < info->sector_count; i++) {
-		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
-		/* D0 = 1 if protected */
-		addr = (volatile FLASH_WORD_SIZE *) (info->start[i]);
-		info->protect[i] = addr[2] & 1;
-	}
-
-	/*
-	 * Prevent writes to uninitialized FLASH.
-	 */
-	if (info->flash_id != FLASH_UNKNOWN) {
-		addr = (volatile FLASH_WORD_SIZE *) info->start[0];
-		if ((info->flash_id & 0xFF00) == FLASH_MAN_INTEL) {
-			*addr = (0x00F000F0 & FLASH_ID_MASK);	/* reset bank */
-		} else {
-			*addr = (0x00FF00FF & FLASH_ID_MASK);	/* reset bank */
-		}
-	}
-
-	return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
-
-	volatile FLASH_WORD_SIZE *addr =
-		(volatile FLASH_WORD_SIZE *) (info->start[0]);
-	int flag, prot, sect, l_sect, barf;
-	ulong start, now, last;
-	int rcode = 0;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN) {
-			printf ("- missing\n");
-		} else {
-			printf ("- no sectors to erase\n");
-		}
-		return 1;
-	}
-
-	if ((info->flash_id == FLASH_UNKNOWN) ||
-	    ((info->flash_id > FLASH_AMD_COMP) &&
-	     ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL))) {
-		printf ("Can't erase unknown flash type - aborted\n");
-		return 1;
-	}
-
-	prot = 0;
-	for (sect = s_first; sect <= s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n", prot);
-	} else {
-		printf ("\n");
-	}
-
-	l_sect = -1;
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-	if (info->flash_id < FLASH_AMD_COMP) {
-#ifndef CONFIG_FLASH_16BIT
-		addr[0x0555] = 0x00AA00AA;
-		addr[0x02AA] = 0x00550055;
-		addr[0x0555] = 0x00800080;
-		addr[0x0555] = 0x00AA00AA;
-		addr[0x02AA] = 0x00550055;
-#else
-		addr[0x0555] = 0x00AA;
-		addr[0x02AA] = 0x0055;
-		addr[0x0555] = 0x0080;
-		addr[0x0555] = 0x00AA;
-		addr[0x02AA] = 0x0055;
-#endif
-		/* Start erase on unprotected sectors */
-		for (sect = s_first; sect <= s_last; sect++) {
-			if (info->protect[sect] == 0) {	/* not protected */
-				addr = (volatile FLASH_WORD_SIZE *) (info->start[sect]);
-				addr[0] = (0x00300030 & FLASH_ID_MASK);
-				l_sect = sect;
-			}
-		}
-
-		/* re-enable interrupts if necessary */
-		if (flag)
-			enable_interrupts ();
-
-		/* wait at least 80us - let's wait 1 ms */
-		udelay (1000);
-
-		/*
-		 * We wait for the last triggered sector
-		 */
-		if (l_sect < 0)
-			goto DONE;
-
-		start = get_timer (0);
-		last = start;
-		addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
-		while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
-		       (0x00800080 & FLASH_ID_MASK)) {
-			if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-				printf ("Timeout\n");
-				return 1;
-			}
-			/* show that we're waiting */
-			if ((now - last) > 1000) {	/* every second */
-				serial_putc ('.');
-				last = now;
-			}
-		}
-
-	      DONE:
-		/* reset to read mode */
-		addr = (volatile FLASH_WORD_SIZE *) info->start[0];
-		addr[0] = (0x00F000F0 & FLASH_ID_MASK);	/* reset bank */
-	} else {
-
-
-		for (sect = s_first; sect <= s_last; sect++) {
-			if (info->protect[sect] == 0) {	/* not protected */
-				barf = 0;
-#ifndef CONFIG_FLASH_16BIT
-				addr = (vu_long *) (info->start[sect]);
-				addr[0] = 0x00200020;
-				addr[0] = 0x00D000D0;
-				while (!(addr[0] & 0x00800080));	/* wait for error or finish */
-				if (addr[0] & 0x003A003A) {	/* check for error */
-					barf = addr[0] & 0x003A0000;
-					if (barf) {
-						barf >>= 16;
-					} else {
-						barf = addr[0] & 0x0000003A;
-					}
-				}
-#else
-				addr = (vu_short *) (info->start[sect]);
-				addr[0] = 0x0020;
-				addr[0] = 0x00D0;
-				while (!(addr[0] & 0x0080));	/* wait for error or finish */
-				if (addr[0] & 0x003A)	/* check for error */
-					barf = addr[0] & 0x003A;
-#endif
-				if (barf) {
-					printf ("\nFlash error in sector at %lx\n", (unsigned long) addr);
-					if (barf & 0x0002)
-						printf ("Block locked, not erased.\n");
-					if ((barf & 0x0030) == 0x0030)
-						printf ("Command Sequence error.\n");
-					if ((barf & 0x0030) == 0x0020)
-						printf ("Block Erase error.\n");
-					if (barf & 0x0008)
-						printf ("Vpp Low error.\n");
-					rcode = 1;
-				} else
-					printf (".");
-				l_sect = sect;
-			}
-			addr = (volatile FLASH_WORD_SIZE *) info->start[0];
-			addr[0] = (0x00FF00FF & FLASH_ID_MASK);	/* reset bank */
-
-		}
-
-	}
-	printf (" done\n");
-	return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-#ifndef CONFIG_FLASH_16BIT
-	ulong cp, wp, data;
-	int l;
-#else
-	ulong cp, wp;
-	ushort data;
-#endif
-	int i, rc;
-
-#ifndef CONFIG_FLASH_16BIT
-
-
-	wp = (addr & ~3);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start bytes
-	 */
-	if ((l = addr - wp) != 0) {
-		data = 0;
-		for (i = 0, cp = wp; i < l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *) cp);
-		}
-		for (; i < 4 && cnt > 0; ++i) {
-			data = (data << 8) | *src++;
-			--cnt;
-			++cp;
-		}
-		for (; cnt == 0 && i < 4; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *) cp);
-		}
-
-		if ((rc = write_word (info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-	while (cnt >= 4) {
-		data = 0;
-		for (i = 0; i < 4; ++i) {
-			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word (info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-		cnt -= 4;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i < 4; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *) cp);
-	}
-
-	return (write_word (info, wp, data));
-
-#else
-	wp = (addr & ~1);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start byte
-	 */
-	if (addr - wp) {
-		data = 0;
-		data = (data << 8) | *src++;
-		--cnt;
-		if ((rc = write_short (info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 2;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-/*	l = 0; used for debuging  */
-	while (cnt >= 2) {
-		data = 0;
-		for (i = 0; i < 2; ++i) {
-			data = (data << 8) | *src++;
-		}
-
-/*		if(!l){
-			printf("%x",data);
-			l = 1;
-		}  used for debuging */
-
-		if ((rc = write_short (info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 2;
-		cnt -= 2;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i < 2; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *) cp);
-	}
-
-	return (write_short (info, wp, data));
-
-
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-#ifndef CONFIG_FLASH_16BIT
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
-	vu_long *addr = (vu_long *) (info->start[0]);
-	ulong start, barf;
-	int flag;
-
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*((vu_long *) dest) & data) != data) {
-		return (2);
-	}
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	if (info->flash_id > FLASH_AMD_COMP) {
-		/* AMD stuff */
-		addr[0x0555] = 0x00AA00AA;
-		addr[0x02AA] = 0x00550055;
-		addr[0x0555] = 0x00A000A0;
-	} else {
-		/* intel stuff */
-		*addr = 0x00400040;
-	}
-	*((vu_long *) dest) = data;
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts ();
-
-	/* data polling for D7 */
-	start = get_timer (0);
-
-	if (info->flash_id > FLASH_AMD_COMP) {
-
-		while ((*((vu_long *) dest) & 0x00800080) !=
-		       (data & 0x00800080)) {
-			if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-				return (1);
-			}
-		}
-
-	} else {
-
-		while (!(addr[0] & 0x00800080)) {	/* wait for error or finish */
-			if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-				return (1);
-			}
-
-			if (addr[0] & 0x003A003A) {	/* check for error */
-				barf = addr[0] & 0x003A0000;
-				if (barf) {
-					barf >>= 16;
-				} else {
-					barf = addr[0] & 0x0000003A;
-				}
-				printf ("\nFlash write error at address %lx\n", (unsigned long) dest);
-				if (barf & 0x0002)
-					printf ("Block locked, not erased.\n");
-				if (barf & 0x0010)
-					printf ("Programming error.\n");
-				if (barf & 0x0008)
-					printf ("Vpp Low error.\n");
-				return (2);
-			}
-
-
-		}
-
-		return (0);
-
-	}
-
-#else
-
-static int write_short (flash_info_t * info, ulong dest, ushort data)
-{
-	vu_short *addr = (vu_short *) (info->start[0]);
-	ulong start, barf;
-	int flag;
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*((vu_short *) dest) & data) != data) {
-		return (2);
-	}
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
-
-	if (info->flash_id < FLASH_AMD_COMP) {
-		/* AMD stuff */
-		addr[0x0555] = 0x00AA;
-		addr[0x02AA] = 0x0055;
-		addr[0x0555] = 0x00A0;
-	} else {
-		/* intel stuff */
-		*addr = 0x00D0;
-		*addr = 0x0040;
-	}
-	*((vu_short *) dest) = data;
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts ();
-
-	/* data polling for D7 */
-	start = get_timer (0);
-
-	if (info->flash_id < FLASH_AMD_COMP) {
-		/* AMD stuff */
-		while ((*((vu_short *) dest) & 0x0080) != (data & 0x0080)) {
-			if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-				return (1);
-			}
-		}
-
-	} else {
-		/* intel stuff */
-		while (!(addr[0] & 0x0080)) {	/* wait for error or finish */
-			if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT)
-				return (1);
-		}
-
-		if (addr[0] & 0x003A) {	/* check for error */
-			barf = addr[0] & 0x003A;
-			printf ("\nFlash write error at address %lx\n",
-				(unsigned long) dest);
-			if (barf & 0x0002)
-				printf ("Block locked, not erased.\n");
-			if (barf & 0x0010)
-				printf ("Programming error.\n");
-			if (barf & 0x0008)
-				printf ("Vpp Low error.\n");
-			return (2);
-		}
-		*addr = 0x00B0;
-		*addr = 0x0070;
-		while (!(addr[0] & 0x0080)) {	/* wait for error or finish */
-			if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT)
-				return (1);
-		}
-		*addr = 0x00FF;
-	}
-	return (0);
-}
-
-#endif
-/*-----------------------------------------------------------------------*/
diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds
deleted file mode 100644
index 59a86bf..0000000
--- a/board/esteem192e/u-boot.lds
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-    net/built-in.o			(.text*)
-    board/esteem192e/built-in.o		(.text*)
-
-    . = env_offset;
-    common/env_embedded.o		(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/configs/ESTEEM192E_defconfig b/configs/ESTEEM192E_defconfig
deleted file mode 100644
index e6279b8..0000000
--- a/configs/ESTEEM192E_defconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-CONFIG_PPC=y
-CONFIG_8xx=y
-CONFIG_TARGET_ESTEEM192E=y
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 0e39857..9d6a6b6 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+ESTEEM192E       powerpc     mpc8xx         -           -           Conn Clark <clark@esteem.com>
 IP860            powerpc     mpc8xx         -           -           Wolfgang Denk <wd@denx.de>
 IVML24           powerpc     mpc8xx         -           -           Wolfgang Denk <wd@denx.de>
 IVMS8            powerpc     mpc8xx         -           -           Wolfgang Denk <wd@denx.de>
diff --git a/include/commproc.h b/include/commproc.h
index c53482c..9582746 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -456,34 +456,6 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00002c00)
 #endif	/* CONFIG_BSEIP */
 
-/***  ESTEEM 192E  **************************************************/
-#ifdef CONFIG_ESTEEM192E
-/* ESTEEM192E
- * This ENET stuff is for the MPC850 with ethernet on SCC2. This
- * is very similar to the RPX-Lite configuration.
- * Note TENA , LOOPBACK , FDPLEX_DIS on Port B.
- */
-
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-
-#define PA_ENET_RXD	((ushort)0x0004)
-#define PA_ENET_TXD	((ushort)0x0008)
-#define PA_ENET_TCLK	((ushort)0x0200)
-#define PA_ENET_RCLK	((ushort)0x0800)
-#define PB_ENET_TENA	((uint)0x00002000)
-#define PC_ENET_CLSN	((ushort)0x0040)
-#define PC_ENET_RENA	((ushort)0x0080)
-
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00003d00)
-
-#define PB_ENET_LOOPBACK ((uint)0x00004000)
-#define PB_ENET_FDPLEX_DIS ((uint)0x00008000)
-
-#endif
-
 /***  KM8XX  *********************************************************/
 
 /* The KM8XX Service Module uses SCC3 for Ethernet */
diff --git a/include/configs/ESTEEM192E.h b/include/configs/ESTEEM192E.h
deleted file mode 100644
index 347f8b6..0000000
--- a/include/configs/ESTEEM192E.h
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC850		1	/* This is a MPC850 CPU		*/
-#define CONFIG_ESTEEM192E	1	/* ...on a EST ESTEEM192E	*/
-
-#define	CONFIG_SYS_TEXT_BASE	0x40000000
-
-#define CONFIG_FLASH_16BIT	1	/* Rom 16 bit data bus		*/
-
-#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
-#undef	CONFIG_8xx_CONS_SMC2
-#undef  CONFIG_8xx_CONS_NONE
-
-#define MPC8XX_FACT	10		/* Multiply by 10		*/
-#define MPC8XX_XIN	4915200	/* 4.915200 MHz in	- ??? - XXX	*/
-#define CONFIG_SYS_PLPRCR_MF	((MPC8XX_FACT-1) << 20)
-#define MPC8XX_HZ ((MPC8XX_XIN) * (MPC8XX_FACT)) /* 49,152,000 Hz	*/
-
-#define CONFIG_8xx_GCLK_FREQ	MPC8XX_HZ	/* Force it - dont measure it */
-
-#define	CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */
-
-#define CONFIG_BAUDRATE		9600
-#if 0
-#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/
-#else
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
-#endif
-#define CONFIG_BOOTCOMMAND	"bootm 40030000" /* autoboot command	*/
-
-#define CONFIG_BOOTARGS		"root=/dev/ram rw ramdisk=8192 "			\
-				"ip=100.100.100.21:100.100.100.14:100.100.100.1:255.0.0.0 "
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	CONFIG_SYS_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
-
-#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-
-#define	CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define	CONFIG_SYS_PROMPT	"BOOT: "	/* Monitor Command Prompt	*/
-#define	CONFIG_SYS_CBSIZE	256			/* Console I/O Buffer Size	*/
-#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS	8			/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
-
-#define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	*/
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFF000000
-
-  /*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define	CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define	CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0x40000000
-#ifdef	DEBUG
-#define	CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
-#else
-#define	CONFIG_SYS_MONITOR_LEN		(128 << 10)	/* Reserve 128 kB for Monitor	*/
-#endif
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
-#define	CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*/
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	71	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-#define	CONFIG_ENV_IS_IN_FLASH	1
-#define	CONFIG_ENV_OFFSET		0x8000	/*   Offset   of Environment Sector	*/
-#define	CONFIG_ENV_SIZE		0x2000	/* Total Size of Environment Sector	*/
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-
-/*-----------------------------------------------------------------------
- * SUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR	(SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01) /* DBGC00 */
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF | TBSCR_TBE)
-
-/* (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) */
-
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit - leave PLL multiplication factor unchanged !
- */
-#define CONFIG_SYS_PLPRCR	(CONFIG_SYS_PLPRCR_MF | PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK	SCCR_EBDF11
-#define CONFIG_SYS_SCCR	(SCCR_TBS     | \
-			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00)
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_PCMCIA_MEM_ADDR	(0xE0000000)
-#define CONFIG_SYS_PCMCIA_MEM_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_DMA_ADDR	(0xE4000000)
-#define CONFIG_SYS_PCMCIA_DMA_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	(0xE8000000)
-#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_IO_ADDR	(0xEC000000)
-#define CONFIG_SYS_PCMCIA_IO_SIZE	( 64 << 20 )
-
-#define CONFIG_SYS_PCMCIA_INTERRUPT	SIU_LEVEL6
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-/*#define	CONFIG_SYS_DER	0x2002000F*/
-#define CONFIG_SYS_DER	0
-/*#define CONFIG_SYS_DER	0x02002000 */
-
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM	0x40000000	/* FLASH bank #0	*/
-#define FLASH_BASE1_PRELIM	0x60000000	/* FLASH bank #0	*/
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-#define CONFIG_SYS_REMAP_OR_AM		0x80000000	/* OR addr mask */
-#define CONFIG_SYS_PRELIM_OR_AM	0xE0000000	/* OR addr mask */
-
-/* FLASH timing: ACS = 11, TRLX = 0, CSNT = 1, SCY = 5, EHTR = 1	*/
-#define CONFIG_SYS_OR_TIMING_FLASH	0x00000160
-				/*(OR_CSNT_SAM  | OR_ACS_DIV2 | OR_BI | \
-				 OR_SCY_5_CLK | OR_EHTR) */
-
-#define CONFIG_SYS_OR0_REMAP	0x80000160     /*(CONFIG_SYS_REMAP_OR_AM  | CONFIG_SYS_OR_TIMING_FLASH)*/
-#define CONFIG_SYS_OR0_PRELIM	(CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM	( FLASH_BASE0_PRELIM | 0x00000801 )
-
-#define CONFIG_SYS_OR1_REMAP	CONFIG_SYS_OR0_REMAP
-#define CONFIG_SYS_OR1_PRELIM	CONFIG_SYS_OR0_PRELIM
-#define CONFIG_SYS_BR1_PRELIM	( FLASH_BASE1_PRELIM | 0x00000801 )
-
-/*
- * BR2/3 and OR2/3 (SDRAM)
- *
- */
-#define SDRAM_BASE2_PRELIM	0x00000000	/* SDRAM bank #0	*/
-#define SDRAM_BASE3_PRELIM	0x04000000	/* SDRAM bank #1	*/
-#define	SDRAM_MAX_SIZE		0x02000000	/* max 32 MB per bank	*/
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	0x00000A00
-
-#define CONFIG_SYS_OR2_PRELIM	0xFC000E00
-#define CONFIG_SYS_BR2_PRELIM	(SDRAM_BASE2_PRELIM | 0x00000081)
-
-#define	CONFIG_SYS_OR3_PRELIM	CONFIG_SYS_OR2_PRELIM
-#define CONFIG_SYS_BR3_PRELIM	(SDRAM_BASE3_PRELIM | 0x00000081)
-
-
-/*
- * Memory Periodic Timer Prescaler
- */
-
-/* periodic timer for refresh */
-#define CONFIG_SYS_MAMR_PTA	97		/* start with divider for 100 MHz	*/
-
-/* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit	*/
-#define CONFIG_SYS_MPTPR_2BK_4K	MPTPR_PTP_DIV16		/* setting for 2 banks	*/
-#define CONFIG_SYS_MPTPR_1BK_4K	MPTPR_PTP_DIV32		/* setting for 1 bank	*/
-
-/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit		*/
-#define CONFIG_SYS_MPTPR_2BK_8K	MPTPR_PTP_DIV8		/* setting for 2 banks	*/
-#define CONFIG_SYS_MPTPR_1BK_8K	MPTPR_PTP_DIV16		/* setting for 1 bank	*/
-
-/*
- * MAMR settings for SDRAM
- */
-
-/* 8 column SDRAM */
-#define CONFIG_SYS_MAMR_8COL	0x18803112
-#define CONFIG_SYS_MAMR_9COL	0x18803112	/* same as 8 column because its just easier to port with*/
-
-#endif	/* __CONFIG_H */