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| author | Jerry Huang <Changm-Ming.Huang@freescale.com> | 2010-11-25 17:06:10 +0000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-12-18 22:11:31 +0100 |
| commit | 9a4d50e34dde4d03f9c7c595f548d8c214d98eb7 (patch) | |
| tree | bb9941fcaffb76f6507200de3b1b64e08b29893d | |
| parent | 94c08a20fc500fcc066bb83f0235b5e344e65ac6 (diff) | |
| download | u-boot-imx-9a4d50e34dde4d03f9c7c595f548d8c214d98eb7.zip u-boot-imx-9a4d50e34dde4d03f9c7c595f548d8c214d98eb7.tar.gz u-boot-imx-9a4d50e34dde4d03f9c7c595f548d8c214d98eb7.tar.bz2 | |
fsl_esdhc: Fix max clock frequency
The max clock of MMC is 52MHz
Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 73d5cd3..7bab2f6 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -477,7 +477,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; mmc->f_min = 400000; - mmc->f_max = MIN(gd->sdhc_clk, 50000000); + mmc->f_max = MIN(gd->sdhc_clk, 52000000); mmc_register(mmc); |