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authorAnton Vorontsov <avorontsov@ru.mvista.com>2007-11-14 18:54:53 +0300
committerKim Phillips <kim.phillips@freescale.com>2008-01-08 09:55:39 -0600
commit651d96f7e4c84adcdb98ef07ec878c20326e3359 (patch)
tree74d8e0319d6dee8ddd3d4119a43b0f4626b524e6
parentb2893e1fcb28fad8c8b317104df8cee0142c7631 (diff)
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MPC8360E-MDS: configure and enable second UART
Despite user manual, BCSR9.7 is negated (high) on HRST, so UART2 is disabled. Fix that and configure QE pins properly. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
-rw-r--r--board/freescale/mpc8360emds/mpc8360emds.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index e050cd4..538a556 100644
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -87,6 +87,11 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{0, 1, 3, 0, 2}, /* MDIO */
{0, 2, 1, 0, 1}, /* MDC */
+ {5, 0, 1, 0, 2}, /* UART2_SOUT */
+ {5, 1, 2, 0, 3}, /* UART2_CTS */
+ {5, 2, 1, 0, 1}, /* UART2_RTS */
+ {5, 3, 2, 0, 2}, /* UART2_SIN */
+
{0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
};
@@ -106,6 +111,9 @@ int board_early_init_f(void)
immr->sysconf.spridr == SPR_8360E_REV21)
bcsr[0xe] = 0x30;
+ /* Enable second UART */
+ bcsr[0x9] &= ~0x01;
+
return 0;
}