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| author | Simon Glass <sjg@chromium.org> | 2012-10-29 05:24:05 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-11-02 15:20:43 -0700 |
| commit | 51bdad67cb6738c5d0e78084cf3e3baa216f4d2f (patch) | |
| tree | 78d6c738944dc38ff51b26ce29d66c281cd77655 | |
| parent | b6458d38d6dcdb00a70d12a8a48a2c0ca7eacbf7 (diff) | |
| download | u-boot-imx-51bdad67cb6738c5d0e78084cf3e3baa216f4d2f.zip u-boot-imx-51bdad67cb6738c5d0e78084cf3e3baa216f4d2f.tar.gz u-boot-imx-51bdad67cb6738c5d0e78084cf3e3baa216f4d2f.tar.bz2 | |
x86: config: Enable AHCI support for coreboot
Enable AHCI driver for Intel SATA devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | include/configs/coreboot.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 3df085b..cc95e2b 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -45,6 +45,28 @@ #undef CONFIG_WATCHDOG #undef CONFIG_HW_WATCHDOG +/* SATA AHCI storage */ + +#define CONFIG_SCSI_AHCI + +#ifdef CONFIG_SCSI_AHCI +#define CONFIG_SYS_64BIT_LBA +#define CONFIG_SATA_INTEL 1 +#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ + {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ + {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ + {PCI_VENDOR_ID_INTEL, \ + PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} + +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#endif + /*----------------------------------------------------------------------- * Real Time Clock Configuration */ |