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| author | Marek Vasut <marek.vasut@gmail.com> | 2009-10-14 00:25:33 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut@gmail.com> | 2010-06-13 13:39:11 +0200 |
| commit | 43c15d3dd570be97d44944cade99ab03e6d5491e (patch) | |
| tree | 117e03b53c6b9087ae554f4684185cd6a9e4bf20 | |
| parent | 55429a0323c8b39618b0005a7b8e496c5f8da997 (diff) | |
| download | u-boot-imx-43c15d3dd570be97d44944cade99ab03e6d5491e.zip u-boot-imx-43c15d3dd570be97d44944cade99ab03e6d5491e.tar.gz u-boot-imx-43c15d3dd570be97d44944cade99ab03e6d5491e.tar.bz2 | |
PXA: PXAMMC: Add Monahans support
This patch enables PXAMCI support on PXA3xx CPUs. This patch only enables MMC1
though, MMC2 and PXA31x MMC3 will need further patch to be operational.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| -rw-r--r-- | drivers/mmc/pxa_mmc.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/mmc/pxa_mmc.c b/drivers/mmc/pxa_mmc.c index b155541..8776903 100644 --- a/drivers/mmc/pxa_mmc.c +++ b/drivers/mmc/pxa_mmc.c @@ -126,7 +126,7 @@ mmc_block_read(uchar * dst, ulong src, ulong len) MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ; while (len) { if (MMC_I_REG & MMC_I_REG_RXFIFO_RD_REQ) { -#ifdef CONFIG_PXA27X +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) int i; for (i = min(len, 32); i; i--) { *dst++ = *((volatile uchar *)&MMC_RXFIFO); @@ -558,8 +558,11 @@ mmc_legacy_init(int verbose) set_GPIO_mode(GPIO6_MMCCLK_MD); set_GPIO_mode(GPIO8_MMCCS0_MD); #endif +#ifdef CONFIG_CPU_MONAHANS /* pxa3xx */ + CKENA |= CKENA_12_MMC0 | CKENA_13_MMC1; +#else /* pxa2xx */ CKEN |= CKEN12_MMC; /* enable MMC unit clock */ - +#endif MMC_CLKRT = MMC_CLKRT_0_3125MHZ; MMC_RESTO = MMC_RES_TO_MAX; MMC_SPI = MMC_SPI_DISABLE; @@ -624,7 +627,7 @@ mmc_legacy_init(int verbose) MMC_CLKRT = 0; /* 20 MHz */ resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca, 0, MMC_CMDAT_R1); -#ifdef CONFIG_PXA27X +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) if (IF_TYPE_SD == mmc_dev.if_type) { resp = mmc_cmd(MMC_CMD_APP_CMD, rca, 0, MMC_CMDAT_R1); resp = mmc_cmd(SD_CMD_APP_SET_BUS_WIDTH, 0, 2, MMC_CMDAT_R1); |