mpc8xx: remove KUP4X, KUP4K board support

These boards are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Klaus Heydeck <heydeck@kieback-peter.de>

25 files changed, 2 insertions, 2755 deletions

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 30f8533..7fa5b0b 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -37,12 +37,6 @@ config TARGET_RRVISION
 config TARGET_SPD823TS
 	bool "Support SPD823TS"
 
-config TARGET_KUP4K
-	bool "Support KUP4K"
-
-config TARGET_KUP4X
-	bool "Support KUP4X"
-
 config TARGET_TQM823L
 	bool "Support TQM823L"
 
@@ -86,8 +80,6 @@ source "board/cogent/Kconfig"
 source "board/esteem192e/Kconfig"
 source "board/ip860/Kconfig"
 source "board/ivm/Kconfig"
-source "board/kup/kup4k/Kconfig"
-source "board/kup/kup4x/Kconfig"
 source "board/lwmon/Kconfig"
 source "board/netvia/Kconfig"
 source "board/r360mpi/Kconfig"
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index eb4432f..9967664 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -598,17 +598,6 @@ void reset_8xx_watchdog (volatile immap_t * immr)
 	immr->im_ioport.iop_paodr &= ~(WATCHDOG_BIT);	/* active output */
 
 	immr->im_ioport.iop_padat ^= WATCHDOG_BIT;	/* Toggle WDI   */
-# elif defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
-	/*
-	 * The KUP4 boards uses a TPS3705 Watchdog
-	 * with the trigger pin connected to port PA.5
-	 */
-# define WATCHDOG_BIT	0x0400
-	immr->im_ioport.iop_papar &= ~(WATCHDOG_BIT);	/* GPIO     */
-	immr->im_ioport.iop_padir |= WATCHDOG_BIT;	/* Output   */
-	immr->im_ioport.iop_paodr &= ~(WATCHDOG_BIT);	/* active output */
-
-	immr->im_ioport.iop_padat ^= WATCHDOG_BIT;	/* Toggle WDI   */
 # else
 	/*
 	 * All other boards use the MPC8xx Internal Watchdog
diff --git a/board/kup/common/flash.c b/board/kup/common/flash.c
deleted file mode 100644
index 77c7b6c..0000000
--- a/board/kup/common/flash.c
+++ /dev/null
@@ -1,499 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef	CONFIG_ENV_ADDR
-#define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-#endif
-
-#define CONFIG_FLASH_16BIT
-
-flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-	volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	unsigned long size_b0;
-	int i;
-
-	/* Init: no FLASHes known */
-	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	/* Static FLASH Bank configuration here - FIXME XXX */
-
-	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
-	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-			size_b0, size_b0<<20);
-	}
-
-
-	/* Remap FLASH according to real size */
-	memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
-	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16;
-
-	/* Re-do sizing to get full correct info */
-	size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-	/* monitor protection ON by default */
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_SYS_MONITOR_BASE,
-		      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
-		      &flash_info[0]);
-#endif
-
-#ifdef	CONFIG_ENV_IS_IN_FLASH
-	/* ENV protection ON by default */
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_ENV_ADDR,
-		      CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1,
-		      &flash_info[0]);
-#endif
-
-	flash_info[0].size = size_b0;
-
-	return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info  (flash_info_t *info)
-{
-	int i;
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		return;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case FLASH_MAN_AMD:	printf ("AMD ");		break;
-	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
-	default:		printf ("Unknown Vendor ");	break;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
-				break;
-	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
-				break;
-	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
-				break;
-	case FLASH_AM320B:	printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
-				break;
-	case FLASH_AM320T:	printf ("AM29LV320T (32 Mbit, top boot sector)\n");
-				break;
-	default:		printf ("Unknown Chip Type\n");
-				break;
-	}
-
-	printf ("  Size: %ld MB in %d Sectors\n",
-		info->size >> 20, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-	for (i=0; i<info->sector_count; ++i) {
-		if ((i % 5) == 0)
-			printf ("\n   ");
-		printf (" %08lX%s",
-			info->start[i],
-			info->protect[i] ? " (RO)" : "     "
-		);
-	}
-	printf ("\n");
-	return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
-	short i;
-	ulong value;
-	ulong base = (ulong)addr;
-
-	/* Write auto select command: read Manufacturer ID */
-	vu_short *s_addr=(vu_short*)addr;
-	s_addr[0x5555] = 0x00AA;
-	s_addr[0x2AAA] = 0x0055;
-	s_addr[0x5555] = 0x0090;
-
-	value = s_addr[0];
-	value = value|(value<<16);
-
-	switch (value) {
-	case AMD_MANUFACT:
-		info->flash_id = FLASH_MAN_AMD;
-		break;
-	case FUJ_MANUFACT:
-		info->flash_id = FLASH_MAN_FUJ;
-		break;
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		info->sector_count = 0;
-		info->size = 0;
-		return (0);			/* no or unknown flash	*/
-	}
-
-	value = s_addr[1];
-	value = value|(value<<16);
-
-		switch (value) {
-	case FUJI_ID_29F800BA:
-		info->flash_id += FLASH_AM400T;
-		info->sector_count = 19;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-	case AMD_ID_LV800T:
-		info->flash_id += FLASH_AM800T;
-		info->sector_count = 19;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-	case AMD_ID_LV800B:
-		info->flash_id += FLASH_AM800B;
-		info->sector_count = 19;
-		info->size = 0x00100000;
-		break;				/* => 1 MB		*/
-	default:
-		info->flash_id = FLASH_UNKNOWN;
-		return (0);			/* => no or unknown flash */
-	}
-
-	/* set up sector start address table */
-	/* set sector offsets for bottom boot block type	*/
-	info->start[0] = base + 0x00000000;
-	info->start[1] = base + 0x00004000;
-	info->start[2] = base + 0x00006000;
-	info->start[3] = base + 0x00008000;
-	for (i = 4; i < info->sector_count; i++) {
-		info->start[i] = base + (i * 0x00010000) - 0x00030000;
-	}
-
-
-	/* check for protected sectors */
-	for (i = 0; i < info->sector_count; i++) {
-		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
-		/* D0 = 1 if protected */
-		s_addr = (volatile unsigned short *)(info->start[i]);
-		info->protect[i] = s_addr[2] & 1;
-	}
-
-	/*
-	 * Prevent writes to uninitialized FLASH.
-	 */
-	if (info->flash_id != FLASH_UNKNOWN) {
-		s_addr = (volatile unsigned short *)info->start[0];
-		*s_addr = 0x00F0;	/* reset bank */
-	}
-	return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-
-int	flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-	vu_long *addr = (vu_long*)(info->start[0]);
-	int flag, prot, sect;
-	ulong start, now, last;
-#ifdef CONFIG_FLASH_16BIT
-	vu_short *s_addr = (vu_short*)addr;
-#endif
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN) {
-			printf ("- missing\n");
-		} else {
-			printf ("- no sectors to erase\n");
-		}
-		return 1;
-	}
-/*#ifndef CONFIG_FLASH_16BIT
-	ulong type;
-	type = (info->flash_id & FLASH_VENDMASK);
-	if ((type != FLASH_MAN_SST) && (type != FLASH_MAN_STM)) {
-		printf ("Can't erase unknown flash type %08lx - aborted\n",
-			info->flash_id);
-		return;
-	}
-#endif*/
-	prot = 0;
-	for (sect=s_first; sect<=s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n",
-			prot);
-	} else {
-		printf ("\n");
-	}
-
-	start = get_timer (0);
-	last  = start;
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect<=s_last; sect++) {
-		if (info->protect[sect] == 0) {	/* not protected */
-#ifdef CONFIG_FLASH_16BIT
-			vu_short *s_sect_addr = (vu_short*)(info->start[sect]);
-#else
-			vu_long	*sect_addr = (vu_long*)(info->start[sect]);
-#endif
-			/* Disable interrupts which might cause a timeout here */
-			flag = disable_interrupts();
-
-#ifdef CONFIG_FLASH_16BIT
-
-			/*printf("\ns_sect_addr=%x",s_sect_addr);*/
-			s_addr[0x5555] = 0x00AA;
-			s_addr[0x2AAA] = 0x0055;
-			s_addr[0x5555] = 0x0080;
-			s_addr[0x5555] = 0x00AA;
-			s_addr[0x2AAA] = 0x0055;
-			s_sect_addr[0] = 0x0030;
-#else
-			addr[0x5555] = 0x00AA00AA;
-			addr[0x2AAA] = 0x00550055;
-			addr[0x5555] = 0x00800080;
-			addr[0x5555] = 0x00AA00AA;
-			addr[0x2AAA] = 0x00550055;
-			sect_addr[0] = 0x00300030;
-#endif
-			/* re-enable interrupts if necessary */
-			if (flag)
-				enable_interrupts();
-
-			/* wait at least 80us - let's wait 1 ms */
-			udelay (1000);
-
-#ifdef CONFIG_FLASH_16BIT
-			while ((s_sect_addr[0] & 0x0080) != 0x0080) {
-#else
-			while ((sect_addr[0] & 0x00800080) != 0x00800080) {
-#endif
-				if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-					printf ("Timeout\n");
-					return 1;
-				}
-				/* show that we're waiting */
-				if ((now - last) > 1000) {	/* every second */
-					putc ('.');
-					last = now;
-				}
-			}
-		}
-	}
-
-	/* reset to read mode */
-	addr = (volatile unsigned long *)info->start[0];
-#ifdef CONFIG_FLASH_16BIT
-	s_addr[0] = 0x00F0;	/* reset bank */
-#else
-	addr[0] = 0x00F000F0;	/* reset bank */
-#endif
-
-	printf (" done\n");
-	return 0;
-}
-
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-	ulong cp, wp, data;
-	int i, l, rc;
-
-	wp = (addr & ~3);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start bytes
-	 */
-	if ((l = addr - wp) != 0) {
-		data = 0;
-		for (i=0, cp=wp; i<l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-		for (; i<4 && cnt>0; ++i) {
-			data = (data << 8) | *src++;
-			--cnt;
-			++cp;
-		}
-		for (; cnt==0 && i<4; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-	while (cnt >= 4) {
-		data = 0;
-		for (i=0; i<4; ++i) {
-			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp  += 4;
-		cnt -= 4;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i<4; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *)cp);
-	}
-
-	return (write_word(info, wp, data));
-}
-
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
-	vu_long *addr = (vu_long*)(info->start[0]);
-
-#ifdef CONFIG_FLASH_16BIT
-	vu_short high_data;
-	vu_short low_data;
-	vu_short *s_addr = (vu_short*)addr;
-#endif
-	ulong start;
-	int flag;
-
-	/* Check if Flash is (sufficiently) erased */
-	if ((*((vu_long *)dest) & data) != data) {
-		return (2);
-	}
-
-#ifdef CONFIG_FLASH_16BIT
-	/* Write the 16 higher-bits */
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-
-	high_data = ((data>>16) & 0x0000ffff);
-
-	s_addr[0x5555] = 0x00AA;
-	s_addr[0x2AAA] = 0x0055;
-	s_addr[0x5555] = 0x00A0;
-
-	*((vu_short *)dest) = high_data;
-
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts();
-
-	/* data polling for D7 */
-	start = get_timer (0);
-	while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) {
-		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			return (1);
-		}
-	}
-
-
-	/* Write the 16 lower-bits */
-#endif
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-#ifdef CONFIG_FLASH_16BIT
-	dest += 0x2;
-	low_data = (data & 0x0000ffff);
-
-	s_addr[0x5555] = 0x00AA;
-	s_addr[0x2AAA] = 0x0055;
-	s_addr[0x5555] = 0x00A0;
-	*((vu_short *)dest) = low_data;
-
-#else
-	addr[0x5555] = 0x00AA00AA;
-	addr[0x2AAA] = 0x00550055;
-	addr[0x5555] = 0x00A000A0;
-	*((vu_long *)dest) = data;
-#endif
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts();
-
-	/* data polling for D7 */
-	start = get_timer (0);
-
-#ifdef CONFIG_FLASH_16BIT
-	while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) {
-#else
-	while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
-#endif
-
-		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			return (1);
-		}
-	}
-	return (0);
-}
diff --git a/board/kup/common/kup.c b/board/kup/common/kup.c
deleted file mode 100644
index 03ab018..0000000
--- a/board/kup/common/kup.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2004
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "kup.h"
-#include <asm/io.h>
-
-
-int misc_init_f(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile sysconf8xx_t *siu = &immap->im_siu_conf;
-
-	while (in_be32(&siu->sc_sipend) & 0x20000000) {
-		debug("waiting for 5V VCC\n");
-	}
-
-	/* RS232 / RS485 default is RS232 */
-	clrbits_be16(&immap->im_ioport.iop_padat, PA_RS485);
-	clrbits_be16(&immap->im_ioport.iop_papar, PA_RS485);
-	clrbits_be16(&immap->im_ioport.iop_paodr, PA_RS485);
-	setbits_be16(&immap->im_ioport.iop_padir, PA_RS485);
-
-	/* IO Reset min 1 msec */
-	setbits_be16(&immap->im_ioport.iop_padat,
-				 (PA_RESET_IO_01 | PA_RESET_IO_02));
-	clrbits_be16(&immap->im_ioport.iop_papar,
-				 (PA_RESET_IO_01 | PA_RESET_IO_02));
-	clrbits_be16(&immap->im_ioport.iop_paodr,
-				 (PA_RESET_IO_01 | PA_RESET_IO_02));
-	setbits_be16(&immap->im_ioport.iop_padir,
-				 (PA_RESET_IO_01 | PA_RESET_IO_02));
-	udelay(1000);
-	clrbits_be16(&immap->im_ioport.iop_padat,
-				 (PA_RESET_IO_01 | PA_RESET_IO_02));
-	return (0);
-}
-
-#ifdef CONFIG_IDE_LED
-void ide_led(uchar led, uchar status)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-
-	/* We have one led for both pcmcia slots */
-	if (status)
-		clrbits_be16(&immap->im_ioport.iop_padat, PA_LED_YELLOW);
-	else
-		setbits_be16(&immap->im_ioport.iop_padat, PA_LED_YELLOW);
-}
-#endif
-
-void poweron_key(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-
-	clrbits_be16(&immap->im_ioport.iop_pcpar, PC_SWITCH1);
-	clrbits_be16(&immap->im_ioport.iop_pcdir, PC_SWITCH1);
-
-	if (in_be16(&immap->im_ioport.iop_pcdat) & (PC_SWITCH1))
-		setenv("key1", "off");
-	else
-		setenv("key1", "on");
-}
diff --git a/board/kup/common/kup.h b/board/kup/common/kup.h
deleted file mode 100644
index a1369ae..0000000
--- a/board/kup/common/kup.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2004
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __KUP_H
-#define __KUP_H
-
-#define PA_8	0x0080
-#define PA_9	0x0040
-#define PA_10	0x0020
-#define PA_11	0x0010
-#define PA_12	0x0008
-
-#define PB_14	0x00020000
-#define PB_15	0x00010000
-#define PB_16	0x00008000
-#define PB_17	0x00004000
-
-#define PC_4	0x0800
-#define PC_5	0x0400
-#define PC_9	0x0040
-
-#define PA_RS485	PA_11	/* SCC1: 0=RS232 1=RS485 */
-#define PA_LED_YELLOW	PA_8
-#define PA_RESET_IO_01	PA_9	/* Reset left IO */
-#define PA_RESET_IO_02	PA_10	/* Reset right IO */
-#define PB_PROG_IO_01	PB_15	/* Program left IO */
-#define PB_PROG_IO_02	PB_16	/* Program right IO */
-#define BP_USB_VCC	PB_14	/* VCC for USB devices 0=vcc on, 1=vcc off */
-#define PB_LCD_PWM	PB_17	/* PB 17 */
-#define PC_SWITCH1	PC_9	/* Reboot switch */
-
-
-extern void poweron_key(void);
-extern void load_sernum_ethaddr(void);
-
-#endif	/* __KUP_H */
diff --git a/board/kup/common/load_sernum_ethaddr.c b/board/kup/common/load_sernum_ethaddr.c
deleted file mode 100644
index 20fe799..0000000
--- a/board/kup/common/load_sernum_ethaddr.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/*-----------------------------------------------------------------------
- * Process Hardware Information Block:
- *
- * If we boot on a system fresh from factory, check if the Hardware
- * Information Block exists and save the information it contains.
- *
- * The KUP Hardware Information Block is defined as
- * follows:
- * - located in first flash bank
- * - starts at offset CONFIG_SYS_HWINFO_OFFSET
- * - size CONFIG_SYS_HWINFO_SIZE
- *
- * Internal structure:
- * - sequence of ASCII character lines
- * - fields separated by <CR><LF>
- * - last field terminated by NUL character (0x00)
- *
- * Fields in Hardware Information Block:
- * 1) Module Type
- * 2) MAC Address
- * 3) ....
- */
-
-
-#define ETHADDR_TOKEN "ethaddr="
-#define LCD_TOKEN "lcd="
-
-void load_sernum_ethaddr (void)
-{
-	unsigned char *hwi;
-	char *var;
-	unsigned char hwi_stack[CONFIG_SYS_HWINFO_SIZE];
-	char *p;
-
-	hwi = (unsigned char *) (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_HWINFO_OFFSET);
-	if (*((unsigned long *) hwi) != (unsigned long) CONFIG_SYS_HWINFO_MAGIC) {
-		printf ("HardwareInfo not found!\n");
-		return;
-	}
-	memcpy (hwi_stack, hwi, CONFIG_SYS_HWINFO_SIZE);
-
-	/*
-	 ** ethaddr
-	 */
-	var = strstr ((char *)hwi_stack, ETHADDR_TOKEN);
-	if (var) {
-		var += sizeof (ETHADDR_TOKEN) - 1;
-		p = strchr (var, '\r');
-		if ((unsigned char *)p < hwi + CONFIG_SYS_HWINFO_SIZE) {
-			*p = '\0';
-			setenv ("ethaddr", var);
-			*p = '\r';
-		}
-	}
-	/*
-	 ** lcd
-	 */
-	var = strstr ((char *)hwi_stack, LCD_TOKEN);
-	if (var) {
-		var += sizeof (LCD_TOKEN) - 1;
-		p = strchr (var, '\r');
-		if ((unsigned char *)p < hwi + CONFIG_SYS_HWINFO_SIZE) {
-			*p = '\0';
-			setenv ("lcd", var);
-			*p = '\r';
-		}
-	}
-}
diff --git a/board/kup/common/pcmcia.c b/board/kup/common/pcmcia.c
deleted file mode 100644
index 61ba586..0000000
--- a/board/kup/common/pcmcia.c
+++ /dev/null
@@ -1,221 +0,0 @@
-#include <common.h>
-#include <mpc8xx.h>
-#include <pcmcia.h>
-
-#undef	CONFIG_PCMCIA
-
-#if defined(CONFIG_CMD_PCMCIA)
-#define	CONFIG_PCMCIA
-#endif
-
-#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
-#define	CONFIG_PCMCIA
-#endif
-
-#ifdef	CONFIG_PCMCIA
-
-#define PCMCIA_BOARD_MSG "KUP"
-
-#define KUP4K_PCMCIA_B_3V3 (0x00020000)
-
-int pcmcia_hardware_enable(int slot)
-{
-	volatile cpm8xx_t	*cp;
-	volatile pcmconf8xx_t	*pcmp;
-	volatile sysconf8xx_t	*sysp;
-	uint reg, mask;
-
-	debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
-	udelay(10000);
-
-	sysp  = (sysconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_siu_conf));
-	pcmp  = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
-	cp    = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
-
-	/*
-	 * Configure SIUMCR to enable PCMCIA port B
-	 * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
-	 */
-	sysp->sc_siumcr &= ~SIUMCR_DBGC11;	/* set DBGC to 00 */
-
-	/* clear interrupt state, and disable interrupts */
-	pcmp->pcmc_pscr =  PCMCIA_MASK(slot);
-	pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
-
-	/*
-	 * Disable interrupts, DMA, and PCMCIA buffers
-	 * (isolate the interface) and assert RESET signal
-	 */
-	debug ("Disable PCMCIA buffers and assert RESET\n");
-	reg  = 0;
-	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(slot) = reg;
-	udelay(2500);
-
-	/*
-	 * Configure Port B pins for
-	 * 3 Volts enable
-	 */
-	if (slot) { /* Slot A is built-in */
-		cp->cp_pbdir |=  KUP4K_PCMCIA_B_3V3;
-		cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3;
-		/* remove all power */
-		cp->cp_pbdat |=  KUP4K_PCMCIA_B_3V3; /* active low */
-	}
-	/*
-	 * Make sure there is a card in the slot, then configure the interface.
-	 */
-	udelay(10000);
-	debug ("[%d] %s: PIPR(%p)=0x%x\n",
-	       __LINE__,__FUNCTION__,
-	       &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
-	if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
-		printf ("   No Card found\n");
-		return (1);
-	}
-
-	/*
-	 * Power On.
-	 */
-	printf("%s  Slot %c:", slot ? "" : "\n", 'A' + slot);
-	mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
-	reg  = pcmp->pcmc_pipr;
-	debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
-	       reg,
-	       (reg&PCMCIA_VS1(slot))?"n":"ff",
-	       (reg&PCMCIA_VS2(slot))?"n":"ff");
-	if ((reg & mask) == mask) {
-		puts (" 5.0V card found: NOT SUPPORTED !!!\n");
-	} else {
-		if(slot)
-			cp->cp_pbdat &= ~KUP4K_PCMCIA_B_3V3;
-		puts (" 3.3V card found: ");
-	}
-#if 0
-	/*  VCC switch error flag, PCMCIA slot INPACK_ pin */
-	cp->cp_pbdir &= ~(0x0020 | 0x0010);
-	cp->cp_pbpar &= ~(0x0020 | 0x0010);
-	udelay(500000);
-#endif
-	debug ("Enable PCMCIA buffers and stop RESET\n");
-	reg  =  PCMCIA_PGCRX(slot);
-	reg &= ~__MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(slot) = reg;
-
-	udelay(250000);	/* some cards need >150 ms to come up :-( */
-
-	debug ("# hardware_enable done\n");
-
-	return (0);
-}
-
-
-#if defined(CONFIG_CMD_PCMCIA)
-int pcmcia_hardware_disable(int slot)
-{
-	volatile immap_t	*immap;
-	volatile cpm8xx_t	*cp;
-	volatile pcmconf8xx_t	*pcmp;
-	u_long reg;
-
-	debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
-
-	immap = (immap_t *)CONFIG_SYS_IMMR;
-	pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
-	cp    = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
-
-	/* remove all power */
-	if (slot)
-		cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3;
-
-	/* Configure PCMCIA General Control Register */
-	debug ("Disable PCMCIA buffers and assert RESET\n");
-	reg  = 0;
-	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(slot) = reg;
-
-	udelay(10000);
-
-	return (0);
-}
-#endif
-
-
-int pcmcia_voltage_set(int slot, int vcc, int vpp)
-{
-	volatile cpm8xx_t	*cp;
-	volatile pcmconf8xx_t	*pcmp;
-	u_long reg;
-
-	debug ("voltage_set: "	\
-			PCMCIA_BOARD_MSG	\
-			" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
-	'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
-
-	if (!slot) /* Slot A is not configurable */
-		return 0;
-
-	pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia));
-	cp    = (cpm8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_cpm));
-
-	/*
-	 * Disable PCMCIA buffers (isolate the interface)
-	 * and assert RESET signal
-	 */
-	debug ("Disable PCMCIA buffers and assert RESET\n");
-	reg  = PCMCIA_PGCRX(slot);
-	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(slot) = reg;
-	udelay(500);
-
-	debug ("PCMCIA power OFF\n");
-	/*
-	 * Configure Port B pins for
-	 * 3 Volts enable
-	 */
-	cp->cp_pbdir |=  KUP4K_PCMCIA_B_3V3;
-	cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3;
-	/* remove all power */
-	cp->cp_pbdat |=  KUP4K_PCMCIA_B_3V3; /* active low */
-
-	switch(vcc) {
-		case  0:		break;
-		case 33:
-			cp->cp_pbdat &= ~KUP4K_PCMCIA_B_3V3;
-			debug ("PCMCIA powered at 3.3V\n");
-			break;
-		case 50:
-			debug ("PCMCIA: 5Volt vcc not supported\n");
-			break;
-		default:
-			puts("PCMCIA: vcc not supported");
-			break;
-	}
-	udelay(10000);
-	/* Checking supported voltages */
-
-	debug ("PIPR: 0x%x --> %s\n",
-	       pcmp->pcmc_pipr,
-	       (pcmp->pcmc_pipr & (0x80000000 >> (slot << 4)))
-			       ? "only 5 V --> NOT SUPPORTED"
-	: "can do 3.3V");
-
-
-	debug ("Enable PCMCIA buffers and stop RESET\n");
-	reg  =  PCMCIA_PGCRX(slot);
-	reg &= ~__MY_PCMCIA_GCRX_CXRESET;	/* active high */
-	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */
-	PCMCIA_PGCRX(slot) = reg;
-	udelay(500);
-
-	debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
-	       slot+'A');
-	return (0);
-}
-
-#endif	/* CONFIG_PCMCIA */
diff --git a/board/kup/kup4k/Kconfig b/board/kup/kup4k/Kconfig
deleted file mode 100644
index 903c341..0000000
--- a/board/kup/kup4k/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_KUP4K
-
-config SYS_BOARD
-	default "kup4k"
-
-config SYS_VENDOR
-	default "kup"
-
-config SYS_CONFIG_NAME
-	default "KUP4K"
-
-endif
diff --git a/board/kup/kup4k/MAINTAINERS b/board/kup/kup4k/MAINTAINERS
deleted file mode 100644
index 25d90cf..0000000
--- a/board/kup/kup4k/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-KUP4K BOARD
-M:	Klaus Heydeck <heydeck@kieback-peter.de>
-S:	Maintained
-F:	board/kup/kup4k/
-F:	include/configs/KUP4K.h
-F:	configs/KUP4K_defconfig
diff --git a/board/kup/kup4k/Makefile b/board/kup/kup4k/Makefile
deleted file mode 100644
index c896fcd..0000000
--- a/board/kup/kup4k/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= kup4k.o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c
deleted file mode 100644
index 71c6a79..0000000
--- a/board/kup/kup4k/kup4k.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <libfdt.h>
-#include <mpc8xx.h>
-#include <hwconfig.h>
-#include <i2c.h>
-#include "../common/kup.h"
-#include <asm/io.h>
-
-static unsigned char swapbyte(unsigned char c);
-static int read_diag(void);
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ----------------------------------------------------------------------- */
-
-#define	_NOT_USED_	0xFFFFFFFF
-
-const uint sdram_table[] = {
-	/*
-	 * Single Read. (Offset 0 in UPMA RAM)
-	 */
-	0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
-	0x1FF77C47,		/* last */
-
-	/*
-	 * SDRAM Initialization (offset 5 in UPMA RAM)
-	 *
-	 * This is no UPM entry point. The following definition uses
-	 * the remaining space to establish an initialization
-	 * sequence, which is executed by a RUN command.
-	 *
-	 */
-	0x1FF77C35, 0xEFEABC34, 0x1FB57C35,	/* last */
-
-	/*
-	 * Burst Read. (Offset 8 in UPMA RAM)
-	 */
-	0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
-	0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47,	/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Single Write. (Offset 18 in UPMA RAM)
-	 */
-	0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47,	/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Burst Write. (Offset 20 in UPMA RAM)
-	 */
-	0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
-	0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47,	/* last */
-	_NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Refresh  (Offset 30 in UPMA RAM)
-	 */
-	0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC84, 0xFFFFFC07,	/* last */
-	_NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Exception. (Offset 3c in UPMA RAM)
-	 */
-	0x7FFFFC07,		/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ----------------------------------------------------------------------- */
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	uchar rev,mod,tmp,pcf,ak_rev,ak_mod;
-
-	/*
-	 * Init ChipSelect #4 (CAN + HW-Latch)
-	 */
-	out_be32(&immap->im_memctl.memc_or4, CONFIG_SYS_OR4);
-	out_be32(&immap->im_memctl.memc_br4, CONFIG_SYS_BR4);
-
-	/*
-	 * Init ChipSelect #5 (S1D13768)
-	 */
-	out_be32(&immap->im_memctl.memc_or5, CONFIG_SYS_OR5);
-	out_be32(&immap->im_memctl.memc_br5, CONFIG_SYS_BR5);
-
-	tmp = swapbyte(in_8((unsigned char*) LATCH_ADDR));
-	rev = (tmp & 0xF8) >> 3;
-	mod = (tmp & 0x07);
-
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
-	if (read_diag())
-		gd->flags &= ~GD_FLG_SILENT;
-
-	printf("Board: KUP4K Rev %d.%d AK:",rev,mod);
-	/*
-	 * TI Application report: Before using the IO as an input,
-	 * a high must be written to the IO first
-	 */
-	pcf = 0xFF;
-	i2c_write(0x21, 0, 0 , &pcf, 1);
-	if (i2c_read(0x21, 0, 0, &pcf, 1)) {
-		puts("n/a\n");
-	} else {
-		ak_rev = (pcf & 0xF8) >> 3;
-		ak_mod = (pcf & 0x07);
-		printf("%d.%d\n", ak_rev, ak_mod);
-	}
-	return 0;
-}
-
-/* ----------------------------------------------------------------------- */
-
-
-phys_size_t initdram(int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size = 0;
-	uchar *latch, rev, tmp;
-
-	/*
-	 * Init ChipSelect #4 (CAN + HW-Latch) to determine Hardware Revision
-	 * Rev 1..6 -> 48 MB RAM;   Rev >= 7 -> 96 MB
-	 */
-	out_be32(&immap->im_memctl.memc_or4, CONFIG_SYS_OR4);
-	out_be32(&immap->im_memctl.memc_br4, CONFIG_SYS_BR4);
-
-	latch = (uchar *)0x90000200;
-	tmp = swapbyte(*latch);
-	rev = (tmp & 0xF8) >> 3;
-
-	upmconfig(UPMA, (uint *) sdram_table,
-		   sizeof (sdram_table) / sizeof (uint));
-
-	out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR);
-
-	out_be32(&memctl->memc_mar, 0x00000088);
-	/* no refresh yet */
-	if(rev >= 7) {
-		out_be32(&memctl->memc_mamr,
-				 CONFIG_SYS_MAMR_9COL & (~(MAMR_PTAE)));
-	} else {
-		out_be32(&memctl->memc_mamr,
-				 CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE)));
-	}
-
-	udelay(200);
-
-	/* perform SDRAM initializsation sequence */
-
-	/* SDRAM bank 0 */
-	out_be32(&memctl->memc_mcr, 0x80002105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80002830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80002106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	/* SDRAM bank 1 */
-	out_be32(&memctl->memc_mcr, 0x80004105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80004830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80004106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	/* SDRAM bank 2 */
-	out_be32(&memctl->memc_mcr, 0x80006105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80006830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80006106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	setbits_be32(&memctl->memc_mamr, MAMR_PTAE); /* enable refresh */
-	udelay(1000);
-
-	out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR);
-	udelay(1000);
-	if(rev >= 7) {
-		size = 32 * 3 * 1024 * 1024;
-		out_be32(&memctl->memc_or1, CONFIG_SYS_OR1_9COL);
-		out_be32(&memctl->memc_br1, CONFIG_SYS_BR1_9COL);
-		out_be32(&memctl->memc_or2, CONFIG_SYS_OR2_9COL);
-		out_be32(&memctl->memc_br2, CONFIG_SYS_BR2_9COL);
-		out_be32(&memctl->memc_or3, CONFIG_SYS_OR3_9COL);
-		out_be32(&memctl->memc_br3, CONFIG_SYS_BR3_9COL);
-	} else {
-		size = 16 * 3 * 1024 * 1024;
-		out_be32(&memctl->memc_or1, CONFIG_SYS_OR1_8COL);
-		out_be32(&memctl->memc_br1, CONFIG_SYS_BR1_8COL);
-		out_be32(&memctl->memc_or2, CONFIG_SYS_OR2_8COL);
-		out_be32(&memctl->memc_br2, CONFIG_SYS_BR2_8COL);
-		out_be32(&memctl->memc_or3, CONFIG_SYS_OR3_8COL);
-		out_be32(&memctl->memc_br3, CONFIG_SYS_BR3_8COL);
-	}
-	return (size);
-}
-
-/* ----------------------------------------------------------------------- */
-
-
-int misc_init_r(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-
-#ifdef CONFIG_IDE_LED
-	/* Configure PA8 as output port */
-	setbits_be16(&immap->im_ioport.iop_padir, PA_8);
-	setbits_be16(&immap->im_ioport.iop_paodr, PA_8);
-	clrbits_be16(&immap->im_ioport.iop_papar, PA_8);
-	setbits_be16(&immap->im_ioport.iop_padat, PA_8); /* turn it off */
-#endif
-	load_sernum_ethaddr();
-	setenv("hw","4k");
-	poweron_key();
-	return (0);
-}
-
-
-static int read_diag(void)
-{
-	int diag;
-	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
-
-	clrbits_be16(&immr->im_ioport.iop_pcdir, PC_4);	/* input */
-	clrbits_be16(&immr->im_ioport.iop_pcpar, PC_4);	/* gpio */
-	setbits_be16(&immr->im_ioport.iop_pcdir, PC_5);	/* output */
-	clrbits_be16(&immr->im_ioport.iop_pcpar, PC_4);	/* gpio */
-	setbits_be16(&immr->im_ioport.iop_pcdat, PC_5);	/* 1 */
-	udelay(500);
-	if (in_be16(&immr->im_ioport.iop_pcdat) & PC_4) {
-		clrbits_be16(&immr->im_ioport.iop_pcdat, PC_5);/* 0 */
-		udelay(500);
-		if(in_be16(&immr->im_ioport.iop_pcdat) & PC_4)
-			diag = 0;
-		else
-			diag = 1;
-	} else {
-		diag = 0;
-	}
-	clrbits_be16(&immr->im_ioport.iop_pcdir, PC_5);	/* input */
-	return (diag);
-}
-
-static unsigned char swapbyte(unsigned char c)
-{
-	unsigned char result = 0;
-	int i = 0;
-
-	for(i = 0; i < 8; ++i) {
-		result = result << 1;
-		result |= (c & 1);
-		c = c >> 1;
-	}
-	return result;
-}
-
-/*
- * Device Tree Support
- */
-#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-int ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-	return 0;
-}
-#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
diff --git a/board/kup/kup4k/u-boot.lds.debug b/board/kup/kup4k/u-boot.lds.debug
deleted file mode 100644
index 0ea27e8..0000000
--- a/board/kup/kup4k/u-boot.lds.debug
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib/vsprintf.o	(.text)
-    lib/crc32.o		(.text)
-
-    . = env_offset;
-    common/env_embedded.o(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/kup/kup4x/Kconfig b/board/kup/kup4x/Kconfig
deleted file mode 100644
index eeb5d83..0000000
--- a/board/kup/kup4x/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_KUP4X
-
-config SYS_BOARD
-	default "kup4x"
-
-config SYS_VENDOR
-	default "kup"
-
-config SYS_CONFIG_NAME
-	default "KUP4X"
-
-endif
diff --git a/board/kup/kup4x/MAINTAINERS b/board/kup/kup4x/MAINTAINERS
deleted file mode 100644
index 85159e4..0000000
--- a/board/kup/kup4x/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-KUP4X BOARD
-M:	Klaus Heydeck <heydeck@kieback-peter.de>
-S:	Maintained
-F:	board/kup/kup4x/
-F:	include/configs/KUP4X.h
-F:	configs/KUP4X_defconfig
diff --git a/board/kup/kup4x/Makefile b/board/kup/kup4x/Makefile
deleted file mode 100644
index 6945943..0000000
--- a/board/kup/kup4x/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= kup4x.o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
diff --git a/board/kup/kup4x/kup4x.c b/board/kup/kup4x/kup4x.c
deleted file mode 100644
index 0e51bd1..0000000
--- a/board/kup/kup4x/kup4x.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <post.h>
-#include "../common/kup.h"
-#include <asm/io.h>
-
-
-#define	_NOT_USED_	0xFFFFFFFF
-
-const uint sdram_table[] = {
-	/*
-	 * Single Read. (Offset 0 in UPMA RAM)
-	 */
-	0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
-	0x1FF77C47,		/* last */
-
-	/*
-	 * SDRAM Initialization (offset 5 in UPMA RAM)
-	 *
-	 * This is no UPM entry point. The following definition uses
-	 * the remaining space to establish an initialization
-	 * sequence, which is executed by a RUN command.
-	 *
-	 */
-	0x1FF77C35, 0xEFEABC34, 0x1FB57C35,	/* last */
-
-	/*
-	 * Burst Read. (Offset 8 in UPMA RAM)
-	 */
-	0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
-	0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47,	/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Single Write. (Offset 18 in UPMA RAM)
-	 */
-	0x1F27FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47,	/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Burst Write. (Offset 20 in UPMA RAM)
-	 */
-	0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
-	0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47,	/* last */
-	_NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Refresh  (Offset 30 in UPMA RAM)
-	 */
-	0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC84, 0xFFFFFC07,	/* last */
-	_NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
-	/*
-	 * Exception. (Offset 3c in UPMA RAM)
-	 */
-	0x7FFFFC07,		/* last */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	uchar latch, rev, mod;
-
-	/*
-	 * Init ChipSelect #4 (CAN + HW-Latch)
-	 */
-	out_be32(&memctl->memc_or4, 0xFFFF8926);
-	out_be32(&memctl->memc_br4, 0x90000401);
-
-	latch = in_8( (unsigned char *) LATCH_ADDR);
-	rev = (latch & 0xF8) >> 3;
-	mod = (latch & 0x03);
-
-	printf("Board: KUP4X Rev %d.%d\n", rev, mod);
-
-	return 0;
-}
-
-
-phys_size_t initdram(int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-
-	upmconfig(UPMA, (uint *) sdram_table,
-		   sizeof (sdram_table) / sizeof (uint));
-
-	out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR);
-
-	out_be32(&memctl->memc_mar, 0x00000088);
-
-	out_be32(&memctl->memc_mamr,
-		 CONFIG_SYS_MAMR & (~(MAMR_PTAE))); /* no refresh yet */
-
-	udelay(200);
-
-	/* perform SDRAM initializsation sequence */
-
-	/* SDRAM bank 0 */
-	out_be32(&memctl->memc_mcr, 0x80002105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80002830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80002106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	/* SDRAM bank 1 */
-	out_be32(&memctl->memc_mcr, 0x80004105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80004830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80004106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	/* SDRAM bank 2 */
-	out_be32(&memctl->memc_mcr, 0x80006105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80006830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x80006106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	/* SDRAM bank 3 */
-	out_be32(&memctl->memc_mcr, 0x8000C105);
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x8000C830); /* execute twice */
-	udelay(1);
-	out_be32(&memctl->memc_mcr, 0x8000C106); /* RUN MRS Pattern from loc 6 */
-	udelay(1);
-
-	setbits_be32(&memctl->memc_mamr, MAMR_PTAE); /* enable refresh */
-
-	udelay(1000);
-	/* 4 x 16 MB */
-	out_be16(&memctl->memc_mptpr, CONFIG_SYS_MPTPR);
-	udelay(1000);
-	out_be32(&memctl->memc_or1, 0xFF000A00);
-	out_be32(&memctl->memc_br1, 0x00000081);
-	out_be32(&memctl->memc_or2, 0xFE000A00);
-	out_be32(&memctl->memc_br2, 0x01000081);
-	out_be32(&memctl->memc_or3, 0xFD000A00);
-	out_be32(&memctl->memc_br3, 0x02000081);
-	out_be32(&memctl->memc_or6, 0xFC000A00);
-	out_be32(&memctl->memc_br6, 0x03000081);
-	udelay(10000);
-
-	return (4 * 16 * 1024 * 1024);
-}
-
-int misc_init_r(void)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-
-#ifdef CONFIG_IDE_LED
-	/* Configure PA8 as output port */
-	setbits_be16(&immap->im_ioport.iop_padir, PA_8);
-	setbits_be16(&immap->im_ioport.iop_paodr, PA_8);
-	clrbits_be16(&immap->im_ioport.iop_papar, PA_8);
-	setbits_be16(&immap->im_ioport.iop_padat, PA_8); /* turn it off */
-#endif
-	load_sernum_ethaddr();
-	setenv("hw", "4x");
-	poweron_key();
-	return 0;
-}
diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds
deleted file mode 100644
index 0eb2fba..0000000
--- a/board/kup/kup4x/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/kup/kup4x/u-boot.lds.debug b/board/kup/kup4x/u-boot.lds.debug
deleted file mode 100644
index 0ea27e8..0000000
--- a/board/kup/kup4x/u-boot.lds.debug
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib/vsprintf.o	(.text)
-    lib/crc32.o		(.text)
-
-    . = env_offset;
-    common/env_embedded.o(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/configs/KUP4K_defconfig b/configs/KUP4K_defconfig
deleted file mode 100644
index 8e9e26d..0000000
--- a/configs/KUP4K_defconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-CONFIG_PPC=y
-CONFIG_8xx=y
-CONFIG_TARGET_KUP4K=y
diff --git a/configs/KUP4X_defconfig b/configs/KUP4X_defconfig
deleted file mode 100644
index 29520c9..0000000
--- a/configs/KUP4X_defconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-CONFIG_PPC=y
-CONFIG_8xx=y
-CONFIG_TARGET_KUP4X=y
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 426cadc..3a27d4c 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -12,6 +12,8 @@ The list should be sorted in reverse chronological order.
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+KUP4K            powerpc     mpc8xx         -           -           Klaus Heydeck <heydeck@kieback-peter.de>
+KUP4X            powerpc     mpc8xx         -           -           Klaus Heydeck <heydeck@kieback-peter.de>
 ELPT860          powerpc     mpc8xx         -           -           The LEOX team <team@leox.org>
 hmi1001          powerpc     mpc5xxx        -           -
 mucmc52          powerpc     mpc5xxx        -           -           Heiko Schocher <hs@denx.de>
diff --git a/include/commproc.h b/include/commproc.h
index af67878..311745e 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -543,36 +543,6 @@ typedef struct scc_enet {
 
 #endif	/* CONFIG_IVMS8, CONFIG_IVML24 */
 
-/***  KUP4K, KUP4X ****************************************************/
-/* The KUP4 boards uses the FEC on a MPC8xx for Ethernet */
-
-#if defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
-
-#define	FEC_ENET	/* use FEC for EThernet */
-#undef	SCC_ENET
-
-#define	PB_ENET_POWER	((uint)0x00010000)	/* PB 15 */
-
-#define PC_ENET_RESET	((ushort)0x0010)	/* PC 11 */
-
-#define PD_MII_TXD1	((ushort)0x1000)	/* PD  3 */
-#define PD_MII_TXD2	((ushort)0x0800)	/* PD  4 */
-#define PD_MII_TXD3	((ushort)0x0400)	/* PD  5 */
-#define PD_MII_RX_DV	((ushort)0x0200)	/* PD  6 */
-#define PD_MII_RX_ERR	((ushort)0x0100)	/* PD  7 */
-#define PD_MII_RX_CLK	((ushort)0x0080)	/* PD  8 */
-#define PD_MII_TXD0	((ushort)0x0040)	/* PD  9 */
-#define PD_MII_RXD0	((ushort)0x0020)	/* PD 10 */
-#define PD_MII_TX_ERR	((ushort)0x0010)	/* PD 11 */
-#define PD_MII_MDC	((ushort)0x0008)	/* PD 12 */
-#define PD_MII_RXD1	((ushort)0x0004)	/* PD 13 */
-#define PD_MII_RXD2	((ushort)0x0002)	/* PD 14 */
-#define PD_MII_RXD3	((ushort)0x0001)	/* PD 15 */
-
-#define PD_MII_MASK	((ushort)0x1FFF)	/* PD 3...15 */
-
-#endif	/* CONFIG_KUP4K */
-
 /***  LWMON  **********************************************************/
 
 #if defined(CONFIG_LWMON)
diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h
deleted file mode 100644
index 7cf09d0..0000000
--- a/include/configs/KUP4K.h
+++ /dev/null
@@ -1,488 +0,0 @@
-/*
-  * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * board/config.h - configuration options, board specific
- * Derived from ../tqm8xx/tqm8xx.c
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC855		1	/* This is a MPC855 CPU		*/
-#define CONFIG_KUP4K		1	/* ...on a KUP4K module */
-
-#define	CONFIG_SYS_TEXT_BASE	0x40000000
-
-#define CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
-#undef	CONFIG_8xx_CONS_SMC2
-#undef	CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE		115200	/* console baudrate		*/
-#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second	*/
-
-#define CONFIG_BOARD_TYPES	1	/* support board types		*/
-
-#undef	CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS						\
-"slot_a_boot=setenv bootargs root=/dev/sda2 ip=off;"				\
- "run addhw; mw.b 400000 00 80; diskboot 400000 0:1; bootm 400000\0"		\
-"slot_b_boot=setenv bootargs root=/dev/sda2 ip=off;"				\
- "run addhw; mw.b 400000 00 80; diskboot 400000 2:1; bootm 400000\0"		\
-"nfs_boot=mw.b 400000 00 80; dhcp; run nfsargs addip addhw; bootm 400000\0"	\
-"fat_boot=mw.b 400000 00 80; fatload ide 2:1 400000 st.bin; run addhw;		\
- bootm 400000 \0"								\
-"panic_boot=echo No Bootdevice !!! reset\0"					\
-"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${rootpath}\0"		\
-"ramargs=setenv bootargs root=/dev/ram rw\0"					\
-"addip=setenv bootargs ${bootargs} ip=${ipaddr}::${gatewayip}"			\
- ":${netmask}:${hostname}:${netdev}:off\0"					\
-"addhw=setenv bootargs ${bootargs} ${mtdparts} console=${console} ${debug}	\
- hw=${hw} key1=${key1} panic=1 mem=${mem}\0"					\
-"console=ttyCPM0,115200\0"							\
-"netdev=eth0\0"									\
-"contrast=20\0"									\
-"silent=1\0"									\
-"mtdparts=" MTDPARTS_DEFAULT "\0"						\
-"load=tftp 200000 bootloader-4k.bitmap;tftp 100000 bootloader-4k.bin\0"		\
-"update=protect off 1:0-9;era 1:0-9;cp.b 100000 40000000 ${filesize};"		\
- "cp.b 200000 40050000 14000\0"
-
-#define CONFIG_BOOTCOMMAND  \
-    "run fat_boot;run slot_b_boot;run slot_a_boot;run nfs_boot;run panic_boot"
-
-#define CONFIG_PREBOOT	"setenv preboot; saveenv"
-
-#define CONFIG_MISC_INIT_R	1
-#define CONFIG_MISC_INIT_F	1
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	CONFIG_SYS_LOADS_BAUD_CHANGE	/* don't allow baudrate change	*/
-
-#define	CONFIG_WATCHDOG	1		/* watchdog enabled		*/
-
-#define CONFIG_STATUS_LED	1	/* Status LED enabled		*/
-
-#undef	CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-
-/*
- * enable I2C and select the hardware/software driver
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED	93000	/* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SOFT_SLAVE	0xFE
-
-/*
- * Software (bit-bang) I2C driver configuration
- */
-#define PB_SCL		0x00000020	/* PB 26 */
-#define PB_SDA		0x00000010	/* PB 27 */
-
-#define I2C_INIT	(immr->im_cpm.cp_pbdir |=  PB_SCL)
-#define I2C_ACTIVE	(immr->im_cpm.cp_pbdir |=  PB_SDA)
-#define I2C_TRISTATE	(immr->im_cpm.cp_pbdir &= ~PB_SDA)
-#define I2C_READ	((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
-#define I2C_SDA(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
-			else    immr->im_cpm.cp_pbdat &= ~PB_SDA
-#define I2C_SCL(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
-			else    immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY	udelay(2)	/* 1/4 I2C clock duration */
-
-/*-----------------------------------------------------------------------
- * I2C Configuration
- */
-
-#define CONFIG_SYS_I2C_PICIO_ADDR	0x21	/* PCF8574 IO Expander */
-#define CONFIG_SYS_I2C_RTC_ADDR		0x51	/* PCF8563 RTC */
-
-/* List of I2C addresses to be verified by POST */
-
-#define CONFIG_SYS_POST_I2C_ADDRS	{CONFIG_SYS_I2C_PICIO_ADDR,	\
-					 CONFIG_SYS_I2C_RTC_ADDR,	\
-					}
-
-#define CONFIG_RTC_PCF8563		/* use Philips PCF8563 RTC	*/
-
-#define CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_MII
-
-/* Define to allow the user to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_SNTP
-
-#ifdef CONFIG_POST
-    #define CONFIG_CMD_DIAG
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE	512		/* Console I/O Buffer Size	*/
-#endif
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x000400000	/* memtest works on     */
-#define CONFIG_SYS_MEMTEST_END		0x005C00000	/* 4 ... 92 MB in DRAM  */
-#define CONFIG_SYS_ALT_MEMTEST 1
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x90000200	/* using latch as scratch register */
-
-#define CONFIG_SYS_LOAD_ADDR		0x400000	/* default load address */
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 115200 }
-
-#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFFF00000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0x40000000
-#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	19	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_OFFSET		0x40000 /*   Offset   of Environment Sector	*/
-#define CONFIG_ENV_SIZE		0x1000	/* Total Size of Environment Sector	*/
-#define CONFIG_ENV_SECT_SIZE	0x10000
-
-/*-----------------------------------------------------------------------
- * Dynamic MTD partition support
- */
-#define MTDPARTS_DEFAULT	"mtdparts=40000000.flash:256k(u-boot),"	\
-						"64k(env),"		\
-						"128k(splash),"		\
-						"512k(etc),"		\
-						"64k(hw-info)"
-
-/*-----------------------------------------------------------------------
- * Hardware Information Block
- */
-#define CONFIG_SYS_HWINFO_OFFSET	0x000F0000	/* offset of HW Info block */
-#define CONFIG_SYS_HWINFO_SIZE		0x00000100	/* size   of HW Info block */
-#define CONFIG_SYS_HWINFO_MAGIC	0x4B26500D		/* 'K&P<CR>' */
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR	(SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC00)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register		11-27
- *-----------------------------------------------------------------------
- */
-#define CONFIG_SYS_RTCSC	(RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit
- *
- * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
- */
-#define CONFIG_SYS_PLPRCR ( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK	SCCR_EBDF00
-#define CONFIG_SYS_SCCR	(SCCR_TBS | SCCR_EBDF01 |  \
-			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00)
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-
-/* KUP4K use both slots, SLOT_A as "primary". */
-#define CONFIG_PCMCIA_SLOT_A 1
-
-#define CONFIG_SYS_PCMCIA_MEM_ADDR	(0xE0000000)
-#define CONFIG_SYS_PCMCIA_MEM_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_DMA_ADDR	(0xE4000000)
-#define CONFIG_SYS_PCMCIA_DMA_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	(0xE8000000)
-#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_IO_ADDR	(0xEC000000)
-#define CONFIG_SYS_PCMCIA_IO_SIZE	( 64 << 20 )
-
-#define PCMCIA_SOCKETS_NO 2
-#define PCMCIA_MEM_WIN_NO 8
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
- *-----------------------------------------------------------------------
- */
-
-#define CONFIG_IDE_PREINIT	1	/* Use preinit IDE hook */
-#define CONFIG_IDE_8xx_PCCARD	1	/* Use IDE with PC Card Adapter */
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE	 not supported	*/
-#define CONFIG_IDE_LED		1	/* LED	 for ide supported	*/
-#undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
-
-#define CONFIG_SYS_IDE_MAXBUS		2
-#define CONFIG_SYS_IDE_MAXDEVICE	4
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_IDE1_OFFSET	(4 * CONFIG_SYS_PCMCIA_MEM_SIZE)
-
-#define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_SYS_PCMCIA_MEM_ADDR
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(2 * CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	0x0100
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_DER 0
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-#define FLASH_BASE0_PRELIM	0x40000000	/* FLASH bank #0	*/
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-#define CONFIG_SYS_REMAP_OR_AM		0x80000000	/* OR addr mask */
-#define CONFIG_SYS_PRELIM_OR_AM	0xE0000000	/* OR addr mask */
-
-/*
- * FLASH timing:
- */
-#define CONFIG_SYS_OR_TIMING_FLASH	(OR_ACS_DIV2  | OR_CSNT_SAM | \
-				 OR_SCY_5_CLK | OR_EHTR | OR_BI)
-
-#define CONFIG_SYS_OR0_REMAP \
-	(CONFIG_SYS_REMAP_OR_AM  | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_OR0_PRELIM \
-	(CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM \
-	((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V )
-
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	0x00000A00
-
-/*
- * Memory Periodic Timer Prescaler
- *
- * The Divider for PTA (refresh timer) configuration is based on an
- * example SDRAM configuration (64 MBit, one bank). The adjustment to
- * the number of chip selects (NCS) and the actually needed refresh
- * rate is done by setting MPTPR.
- *
- * PTA is calculated from
- *	PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS)
- *
- *	gclk	  CPU clock (not bus clock!)
- *	Trefresh  Refresh cycle * 4 (four word bursts used)
- *
- * 4096	 Rows from SDRAM example configuration
- * 1000	 factor s -> ms
- *   32	 PTP (pre-divider from MPTPR) from SDRAM example configuration
- *    4	 Number of refresh cycles per period
- *   64	 Refresh cycle in ms per number of rows
- * --------------------------------------------
- * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
- *
- * 50 MHz => 50.000.000 / Divider =  98
- * 66 Mhz => 66.000.000 / Divider = 129
- * 80 Mhz => 80.000.000 / Divider = 156
- */
-#if   defined(CONFIG_80MHz)
-#define CONFIG_SYS_MAMR_PTA		156
-#elif defined(CONFIG_66MHz)
-#define CONFIG_SYS_MAMR_PTA		129
-#else		/*   50 MHz */
-#define CONFIG_SYS_MAMR_PTA		 98
-#endif	/*CONFIG_??MHz */
-
-/*
- * For 16 MBit, refresh rates could be 31.3 us
- * (= 64 ms / 2K = 125 / quad bursts).
- * For a simpler initialization, 15.6 us is used instead.
- *
- * #define CONFIG_SYS_MPTPR_2BK_2K	MPTPR_PTP_DIV32		for 2 banks
- * #define CONFIG_SYS_MPTPR_1BK_2K	MPTPR_PTP_DIV64		for 1 bank
- */
-#define CONFIG_SYS_MPTPR 0x400
-
-/*
- * MAMR settings for SDRAM
- */
-
-/* 8 column SDRAM */
-#define CONFIG_SYS_MAMR_8COL 0x68802114
-/* 9 column SDRAM */
-#define CONFIG_SYS_MAMR_9COL 0x68904114
-
-/*
- * Chip Selects
- */
-#define CONFIG_SYS_OR0
-#define CONFIG_SYS_BR0
-
-#define CONFIG_SYS_OR1_8COL 0xFF000A00
-#define CONFIG_SYS_BR1_8COL 0x00000081
-#define CONFIG_SYS_OR2_8COL 0xFE000A00
-#define CONFIG_SYS_BR2_8COL 0x01000081
-#define CONFIG_SYS_OR3_8COL 0xFC000A00
-#define CONFIG_SYS_BR3_8COL 0x02000081
-
-#define CONFIG_SYS_OR1_9COL 0xFE000A00
-#define CONFIG_SYS_BR1_9COL 0x00000081
-#define CONFIG_SYS_OR2_9COL 0xFE000A00
-#define CONFIG_SYS_BR2_9COL 0x02000081
-#define CONFIG_SYS_OR3_9COL 0xFE000A00
-#define CONFIG_SYS_BR3_9COL 0x04000081
-
-#define CONFIG_SYS_OR4 0xFFFF8926
-#define CONFIG_SYS_BR4 0x90000401
-
-#define CONFIG_SYS_OR5 0xFFC007F0  /* EPSON: 4 MB  17 WS or externel TA */
-#define CONFIG_SYS_BR5 0x80080801  /* Start at 0x80080000 */
-
-#define LATCH_ADDR 0x90000200
-
-#define CONFIG_AUTOBOOT_KEYED		/* use key strings to stop autoboot */
-#define CONFIG_AUTOBOOT_STOP_STR	"."
-#define CONFIG_SILENT_CONSOLE		1
-#define CONFIG_SYS_DEVICE_NULLDEV	1       /* enble null device		*/
-#define CONFIG_VERSION_VARIABLE		1
-
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT	1
-#define CONFIG_OF_BOARD_SETUP	1
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/KUP4X.h b/include/configs/KUP4X.h
deleted file mode 100644
index 47d1623..0000000
--- a/include/configs/KUP4X.h
+++ /dev/null
@@ -1,440 +0,0 @@
-/*
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * Klaus Heydeck, Kieback & Peter GmbH & Co KG, heydeck@kieback-peter.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * board/config.h - configuration options, board specific
- * Derived from ../tqm8xx/tqm8xx.c
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC859T		1	/* This is a MPC859T CPU	*/
-#define CONFIG_KUP4X		1	/* ...on a KUP4X module		*/
-
-#define	CONFIG_SYS_TEXT_BASE	0x40000000
-
-#define CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
-#undef	CONFIG_8xx_CONS_SMC2
-#undef	CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE		115200	/* console baudrate		*/
-
-#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second	*/
-
-#define CONFIG_BOARD_TYPES	1	/* support board types		*/
-
-#define CONFIG_SYS_8XX_FACT		8	/* Multiply by 8	*/
-#define CONFIG_SYS_8XX_XIN		16000000	/* 16 MHz in	*/
-
-
-#define MPC8XX_HZ ((CONFIG_SYS_8XX_XIN) * (CONFIG_SYS_8XX_FACT))
-
-/* should ALWAYS define this, measure_gclk in speed.c is unreliable */
-/* in general, we always know this for FADS+new ADS anyway */
-#define CONFIG_8xx_GCLK_FREQ	 MPC8XX_HZ
-
-
-#undef	CONFIG_BOOTARGS
-
-
-#define CONFIG_EXTRA_ENV_SETTINGS						\
-"slot_a_boot=setenv bootargs root=/dev/hda2 ip=off;"				\
-  "run addhw;diskboot 200000 0:1;bootm 200000\0"				\
-"usb_boot=setenv bootargs root=/dev/sda2 ip=off;				\
- run addhw; sleep 2; usb reset; usb scan; usbboot 200000 0:1;			\
- usb stop; bootm 200000\0"							\
-"nfs_boot=dhcp;run nfsargs addip addhw;bootm 200000\0"				\
-"panic_boot=echo No Bootdevice !!! reset\0"					\
-"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0"	\
-"ramargs=setenv bootargs root=/dev/ram rw\0"					\
-"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}"	\
- ":${netmask}:${hostname}:${netdev}:off\0"					\
-"addhw=setenv bootargs ${bootargs} hw=${hw} key1=${key1} panic=1\0"		\
-"netdev=eth0\0"									\
-"silent=1\0"									\
-"load=tftp 200000 bootloader-4x.bitmap;tftp 100000 bootloader-4x.bin\0"		\
-"update=protect off 1:0-5;era 1:0-5;cp.b 100000 40000000 ${filesize};"		\
- "cp.b 200000 40040000 14000\0"
-
-#define CONFIG_BOOTCOMMAND  \
-    "run usb_boot;run slot_a_boot;run nfs_boot;run panic_boot"
-
-
-#define CONFIG_MISC_INIT_R	1
-#define CONFIG_MISC_INIT_F	1
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	CONFIG_SYS_LOADS_BAUD_CHANGE	/* don't allow baudrate change	*/
-
-#define	CONFIG_WATCHDOG		1	/* watchdog enabled		*/
-
-#define CONFIG_STATUS_LED	1	/* Status LED enabled		*/
-
-#undef	CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-
-/*
- * enable I2C and select the hardware/software driver
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
-
-#ifdef CONFIG_SYS_I2C_SOFT
-#define CONFIG_SYS_I2C_SOFT_SPEED	93000	/* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SOFT_SLAVE	0xFE
-
-/*
- * Software (bit-bang) I2C driver configuration
- */
-#define PB_SCL		0x00000020	/* PB 26 */
-#define PB_SDA		0x00000010	/* PB 27 */
-
-#define I2C_INIT	(immr->im_cpm.cp_pbdir |=  PB_SCL)
-#define I2C_ACTIVE	(immr->im_cpm.cp_pbdir |=  PB_SDA)
-#define I2C_TRISTATE	(immr->im_cpm.cp_pbdir &= ~PB_SDA)
-#define I2C_READ	((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
-#define I2C_SDA(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
-			else    immr->im_cpm.cp_pbdat &= ~PB_SDA
-#define I2C_SCL(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
-			else    immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY	udelay(2)	/* 1/4 I2C clock duration */
-#endif	/* CONFIG_SYS_I2C_SOFT */
-
-
-/*-----------------------------------------------------------------------
- * I2C Configuration
- */
-
-#define CONFIG_SYS_I2C_PICIO_ADDR	0x21	/* PCF8574 IO Expander	*/
-#define CONFIG_SYS_I2C_RTC_ADDR	0x51	/* PCF8563 RTC			*/
-
-
-/* List of I2C addresses to be verified by POST */
-
-#define CONFIG_SYS_POST_I2C_ADDRS	{CONFIG_SYS_I2C_PICIO_ADDR,	\
-					 CONFIG_SYS_I2C_RTC_ADDR,	\
-					}
-
-
-#define CONFIG_RTC_PCF8563		/* use Philips PCF8563 RTC	*/
-
-#define CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_MII
-
-#undef CONFIG_KUP4K_LOGO
-
-/* Define to allow the user to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-
-/* POST support */
-#define CONFIG_POST		(CONFIG_SYS_POST_CPU	   | \
-				 CONFIG_SYS_POST_RTC	   | \
-				 CONFIG_SYS_POST_I2C)
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_SNTP
-#define CONFIG_CMD_USB
-
-#ifdef CONFIG_POST
-    #define CONFIG_CMD_DIAG
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x000400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x003C00000	/* 4 ... 60 MB in DRAM	*/
-#define CONFIG_SYS_LOAD_ADDR		0x200000	/* default load address */
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 115200 }
-
-#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFFF00000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0x40000000
-#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 256 kB for Monitor	*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	19	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_OFFSET		0x40000 /*   Offset   of Environment Sector	*/
-#define CONFIG_ENV_SIZE		0x1000	/* Total Size of Environment Sector	*/
-#define CONFIG_ENV_SECT_SIZE	0x10000
-
-/* Address and size of Redundant Environment Sector	*/
-#if 0
-#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET+CONFIG_ENV_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-#endif
-/*-----------------------------------------------------------------------
- * Hardware Information Block
- */
-#if 1
-#define CONFIG_SYS_HWINFO_OFFSET	0x000F0000	/* offset of HW Info block */
-#define CONFIG_SYS_HWINFO_SIZE		0x00000100	/* size   of HW Info block */
-#define CONFIG_SYS_HWINFO_MAGIC	0x4B26500D	/* 'K&P<CR>' */
-#endif
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#if 0 && defined(CONFIG_WATCHDOG)       /* KUP uses external TPS3705 WD */
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
-			 SYPCR_SWE  | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR	(SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC00)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register	15-30
- *-----------------------------------------------------------------------
- * set the PLL, the low-power modes and the reset control (15-29)
- */
-#define CONFIG_SYS_PLPRCR	((CONFIG_SYS_8XX_FACT << PLPRCR_MFI_SHIFT) |	\
-				PLPRCR_SPLSS | PLPRCR_TEXPS)
-
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK	SCCR_EBDF00
-#define CONFIG_SYS_SCCR	(SCCR_TBS | SCCR_EBDF01 |  \
-			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00)
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-
-/* KUP4K use both slots, SLOT_A as "primary". */
-#define CONFIG_PCMCIA_SLOT_A 1
-
-#define CONFIG_SYS_PCMCIA_MEM_ADDR	(0xE0000000)
-#define CONFIG_SYS_PCMCIA_MEM_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_DMA_ADDR	(0xE4000000)
-#define CONFIG_SYS_PCMCIA_DMA_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_ATTRB_ADDR	(0xE8000000)
-#define CONFIG_SYS_PCMCIA_ATTRB_SIZE	( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_IO_ADDR	(0xEC000000)
-#define CONFIG_SYS_PCMCIA_IO_SIZE	( 64 << 20 )
-
-#define PCMCIA_SOCKETS_NO 1
-#define PCMCIA_MEM_WIN_NO 8
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
- *-----------------------------------------------------------------------
- */
-
-#define CONFIG_IDE_PREINIT	1	/* Use preinit IDE hook */
-#define CONFIG_IDE_8xx_PCCARD	1	/* Use IDE with PC Card Adapter */
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE	 not supported	*/
-#define CONFIG_IDE_LED			1   /* LED   for ide supported	*/
-#undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
-
-#define CONFIG_SYS_IDE_MAXBUS		1
-#define CONFIG_SYS_IDE_MAXDEVICE	2
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_IDE1_OFFSET	(4 * CONFIG_SYS_PCMCIA_MEM_SIZE)
-
-#define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_SYS_PCMCIA_MEM_ADDR
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(2 * CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	0x0100
-
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_DER 0
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-#define FLASH_BASE0_PRELIM	0x40000000	/* FLASH bank #0	*/
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-#define CONFIG_SYS_REMAP_OR_AM		0x80000000	/* OR addr mask */
-#define CONFIG_SYS_PRELIM_OR_AM	0xE0000000	/* OR addr mask */
-
-/*
- * FLASH timing:
- */
-#define CONFIG_SYS_OR_TIMING_FLASH	(OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
-				 OR_SCY_2_CLK | OR_EHTR | OR_BI)
-
-#define CONFIG_SYS_OR0_REMAP \
-		(CONFIG_SYS_REMAP_OR_AM  | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_OR0_PRELIM \
-		(CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM \
-		((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V )
-
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	0x00000A00
-
-
-#define CONFIG_SYS_MPTPR 0x400
-
-/*
- * MAMR settings for SDRAM
- */
-#define CONFIG_SYS_MAMR 0x80802114
-
-
-/*
- * Chip Selects
- */
-
-#define CONFIG_SYS_OR4 0xFFFF8926
-#define CONFIG_SYS_BR4 0x90000401
-
-#define LATCH_ADDR 0x90000200
-
-#define CONFIG_AUTOBOOT_KEYED		/* use key strings to stop autoboot	*/
-
-#define CONFIG_AUTOBOOT_STOP_STR	"."	/* easy to stop for now		*/
-#define CONFIG_SILENT_CONSOLE	1
-
-#define CONFIG_USB_STORAGE	1
-#define CONFIG_USB_SL811HS	1
-
-#endif	/* __CONFIG_H */
diff --git a/include/status_led.h b/include/status_led.h
index c5de894..1feeff5 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -158,22 +158,6 @@ void status_led_set  (int led, int state);
 # define STATUS_LED_ACTIVE	1		/* LED on for bit == 0	*/
 # define STATUS_LED_BOOT	0		/* LED 0 used for boot status */
 
-/*****  KUP4K, KUP4X  ****************************************************/
-#elif defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
-
-# define STATUS_LED_PAR		im_ioport.iop_papar
-# define STATUS_LED_DIR		im_ioport.iop_padir
-# define STATUS_LED_ODR		im_ioport.iop_paodr
-# define STATUS_LED_DAT		im_ioport.iop_padat
-
-# define STATUS_LED_BIT		0x00000300  /*  green + red    PA[8]=yellow,  PA[7]=red,  PA[6]=green */
-# define STATUS_LED_PERIOD	(CONFIG_SYS_HZ / 2)
-# define STATUS_LED_STATE	STATUS_LED_BLINKING
-
-# define STATUS_LED_ACTIVE	1		/* LED on for bit == 1	*/
-
-# define STATUS_LED_BOOT	0		/* LED 0 used for boot status */
-
 #elif defined(CONFIG_V38B)
 
 # define STATUS_LED_BIT		0x0010			/* Timer7 GPIO */