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author | Dirk Eibach <dirk.eibach@gdsys.cc> | 2014-07-03 09:28:22 +0200 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2014-07-07 19:47:19 -0400 |
commit | 3a990bfaeaf3d8388e1a62163e9361fe89ae3c79 (patch) | |
tree | 741216917eb6f247f9182e2046d89b1d88cbb6b7 | |
parent | 5568fb4402d5b0e01f61867c281b07633f529fd4 (diff) | |
download | u-boot-imx-3a990bfaeaf3d8388e1a62163e9361fe89ae3c79.zip u-boot-imx-3a990bfaeaf3d8388e1a62163e9361fe89ae3c79.tar.gz u-boot-imx-3a990bfaeaf3d8388e1a62163e9361fe89ae3c79.tar.bz2 |
board: gdsys: Make gdsys osd hardware detection more robust
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
-rw-r--r-- | board/gdsys/405ep/iocon.c | 17 | ||||
-rw-r--r-- | board/gdsys/common/osd.c | 113 | ||||
-rw-r--r-- | drivers/i2c/ihs_i2c.c | 1 | ||||
-rw-r--r-- | include/configs/dlvision-10g.h | 2 | ||||
-rw-r--r-- | include/configs/iocon.h | 6 |
5 files changed, 79 insertions, 60 deletions
diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c index 079dfb2..6ae15e1 100644 --- a/board/gdsys/405ep/iocon.c +++ b/board/gdsys/405ep/iocon.c @@ -15,7 +15,6 @@ #include "405ep.h" #include <gdsys_fpga.h> -#include "../common/dp501.h" #include "../common/osd.h" #include "../common/mclink.h" @@ -99,8 +98,6 @@ enum { unsigned int mclink_fpgacount; struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR; -int dp501_i2c[] = CONFIG_SYS_DP501_I2C; - static int setup_88e1518(const char *bus, unsigned char addr); int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data) @@ -374,20 +371,16 @@ int last_stage_init(void) u16 fpga_features; int feature_carrier_speed = fpga_features & (1<<4); bool ch0_rgmii2_present = false; - int old_bus = i2c_get_bus_num(); FPGA_GET_REG(0, fpga_features, &fpga_features); - /* Turn on Parade DP501 */ - pca9698_direction_output(0x20, 9, 1); - udelay(500000); - - i2c_set_bus_num(dp501_i2c[0]); - dp501_powerup(0x08); - i2c_set_bus_num(old_bus); + if (!legacy) { + /* Turn on Parade DP501 */ + pca9698_direction_output(0x20, 9, 1); + udelay(500000); - if (!legacy) ch0_rgmii2_present = !pca9698_get_value(0x20, 30); + } print_fpga_info(0, ch0_rgmii2_present); osd_probe(0); diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index a839a4e..1c765e4 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -9,6 +9,7 @@ #include <i2c.h> #include <malloc.h> +#include "dp501.h" #include <gdsys_fpga.h> #define CH7301_I2C_ADDR 0x75 @@ -24,6 +25,8 @@ #define SIL1178_MASTER_I2C_ADDRESS 0x38 #define SIL1178_SLAVE_I2C_ADDRESS 0x39 +#define DP501_I2C_ADDR 0x08 + #define PIXCLK_640_480_60 25180000 enum { @@ -54,18 +57,23 @@ u16 *buf; unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1; -#ifdef CONFIG_SYS_CH7301 -int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C; +#ifdef CONFIG_SYS_ICS8N3QV01_I2C +int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C; #endif -#ifdef CONFIG_SYS_ICS8N3QV01 -int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C; +#ifdef CONFIG_SYS_CH7301_I2C +int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C; #endif -#ifdef CONFIG_SYS_SIL1178 +#ifdef CONFIG_SYS_SIL1178_I2C int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C; #endif +#ifdef CONFIG_SYS_DP501_I2C +int dp501_i2c[] = CONFIG_SYS_DP501_I2C; +#endif + + #ifdef CONFIG_SYS_MPC92469AC static void mpc92469ac_calc_parameters(unsigned int fout, unsigned int *post_div, unsigned int *feedback_div) @@ -118,7 +126,7 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout) } #endif -#ifdef CONFIG_SYS_ICS8N3QV01 +#ifdef CONFIG_SYS_ICS8N3QV01_I2C static unsigned int ics8n3qv01_get_fout_calc(unsigned index) { @@ -283,6 +291,8 @@ int osd_probe(unsigned screen) u16 features; u8 value; int old_bus = i2c_get_bus_num(); + bool pixclock_present = false; + bool output_driver_present = false; FPGA_GET_REG(0, osd.version, &version); FPGA_GET_REG(0, osd.features, &features); @@ -297,51 +307,76 @@ int osd_probe(unsigned screen) printf("OSD%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n", screen, version/100, version%100, base_width, base_height); -#ifdef CONFIG_SYS_CH7301 - i2c_set_bus_num(ch7301_i2c[screen]); - value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID); - if (value != 0x17) { - printf(" Probing CH7301 failed, DID %02x\n", value); - i2c_set_bus_num(old_bus); - return -1; - } - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0); -#endif + /* setup pixclock */ #ifdef CONFIG_SYS_MPC92469AC + pixclock_present = true; mpc92469ac_set(screen, PIXCLK_640_480_60); #endif -#ifdef CONFIG_SYS_ICS8N3QV01 +#ifdef CONFIG_SYS_ICS8N3QV01_I2C i2c_set_bus_num(ics8n3qv01_i2c[screen]); - ics8n3qv01_set(PIXCLK_640_480_60); + if (!i2c_probe(ICS8N3QV01_I2C_ADDR)) { + ics8n3qv01_set(PIXCLK_640_480_60); + pixclock_present = true; + } #endif -#ifdef CONFIG_SYS_SIL1178 + if (!pixclock_present) + printf(" no pixelclock found\n"); + + /* setup output driver */ + +#ifdef CONFIG_SYS_CH7301_I2C + i2c_set_bus_num(ch7301_i2c[screen]); + if (!i2c_probe(CH7301_I2C_ADDR)) { + value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID); + if (value == 0x17) { + i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08); + i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16); + i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60); + i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09); + i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0); + output_driver_present = true; + } + } +#endif + +#ifdef CONFIG_SYS_SIL1178_I2C i2c_set_bus_num(sil1178_i2c[screen]); - value = i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02); - if (value != 0x06) { - printf(" Probing SIL1178, DEV_IDL %02x\n", value); - i2c_set_bus_num(old_bus); - return -1; + if (!i2c_probe(SIL1178_SLAVE_I2C_ADDRESS)) { + value = i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02); + if (value == 0x06) { + /* + * magic initialization sequence, + * adapted from datasheet + */ + i2c_reg_write(SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36); + i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37); + output_driver_present = true; + } + } +#endif + +#ifdef CONFIG_SYS_DP501_I2C + i2c_set_bus_num(dp501_i2c[screen]); + if (!i2c_probe(DP501_I2C_ADDR)) { + dp501_powerup(DP501_I2C_ADDR); + output_driver_present = true; } - /* magic initialization sequence adapted from datasheet */ - i2c_reg_write(SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36); - i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37); #endif + if (!output_driver_present) + printf(" no output driver found\n"); + FPGA_SET_REG(screen, osd.control, 0x0049); FPGA_SET_REG(screen, osd.xy_size, ((32 - 1) << 8) | (16 - 1)); diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c index ecc5856..fe66ce2 100644 --- a/drivers/i2c/ihs_i2c.c +++ b/drivers/i2c/ihs_i2c.c @@ -34,7 +34,6 @@ static int wait_for_int(bool read) | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV)))) { udelay(10); if (ctr++ > 5000) { - printf("I2C timeout\n"); return 1; } FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, &val); diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index c2289ce..08ab5c3 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -121,9 +121,7 @@ { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } } #define CONFIG_DTT_TACH_LIMIT 0xa10 -#define CONFIG_SYS_ICS8N3QV01 #define CONFIG_SYS_ICS8N3QV01_I2C {0, 1} -#define CONFIG_SYS_SIL1178 #define CONFIG_SYS_SIL1178_I2C {0, 1} /* EBC peripherals */ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 1aebab3..1836d12 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -167,11 +167,6 @@ int fpga_gpio_get(unsigned int bus, int pin); #define I2C_DELAY udelay(25) /* 1/4 I2C clock duration */ /* - * OSD hardware - */ -#define CONFIG_SYS_MPC92469AC - -/* * FLASH organization */ #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ @@ -298,7 +293,6 @@ int fpga_gpio_get(unsigned int bus, int pin); /* * OSD Setup */ -#define CONFIG_SYS_ICS8N3QV01 #define CONFIG_SYS_MPC92469AC #define CONFIG_SYS_OSD_SCREENS 1 #define CONFIG_SYS_DP501_DIFFERENTIAL |