Removed obsolete Netstal boards

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>

24 files changed, 0 insertions, 3143 deletions

diff --git a/CREDITS b/CREDITS
index dacc5b4..34075a0 100644
--- a/CREDITS
+++ b/CREDITS
@@ -161,11 +161,6 @@ N: Thomas Frieden
 E: ThomasF@hyperion-entertainment.com
 D: Support for AmigaOne
 
-N: Niklaus Giger
-E: niklaus.giger@netstal.com
-D: Support for HCU(x) boards
-W: www.netstal.com
-
 N: Paul Gortmaker
 E: paul.gortmaker@windriver.com
 D: Support for WRS SBC8347/8349 boards
diff --git a/MAINTAINERS b/MAINTAINERS
index dd9839e..f8d8559 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -193,12 +193,6 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 	WUH405		PPC405EP
 	CMS700		PPC405EP
 
-Niklaus Giger <niklaus.giger@netstal.com>
-
-	HCU4		PPC405GPr
-	MCU25		PPC405GPr
-	HCU5		PPC440EPx
-
 Siddarth Gore <gores@marvell.com>
 
 	guruplug	ARM926EJS (Kirkwood SoC)
diff --git a/board/netstal/common/fixed_sdram.c b/board/netstal/common/fixed_sdram.c
deleted file mode 100644
index 51b34b2..0000000
--- a/board/netstal/common/fixed_sdram.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- *(C) Copyright 2005-2008 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#include <common.h>
-#include  <asm/ppc4xx.h>
-#include  <asm/processor.h>
-#include  "nm.h"
-
-#if defined(DEBUG)
-void show_sdram_registers(void)
-{
-	u32 value;
-
-	printf("SDRAM Controller Registers --\n");
-	mfsdram(SDRAM0_CFG, value);
-	printf("    SDRAM0_CFG   : 0x%08x\n", value);
-	mfsdram(SDRAM0_STATUS, value);
-	printf("    SDRAM0_STATUS: 0x%08x\n", value);
-	mfsdram(SDRAM0_B0CR, value);
-	printf("    SDRAM0_B0CR  : 0x%08x\n", value);
-	mfsdram(SDRAM0_B1CR, value);
-	printf("    SDRAM0_B1CR  : 0x%08x\n", value);
-	mfsdram(SDRAM0_TR, value);
-	printf("    SDRAM0_TR    : 0x%08x\n", value);
-	mfsdram(SDRAM0_RTR, value);
-	printf("    SDRAM0_RTR   : 0x%08x\n", value);
-}
-#endif
-
-long int init_ppc405_sdram(unsigned int dram_size)
-{
-#ifdef DEBUG
-	printf(__FUNCTION__);
-#endif
-	/* disable memory controller */
-	mtsdram(SDRAM0_CFG, 0x00000000);
-
-	udelay (500);
-
-	/* Clear SDRAM0_BESR0 (Bus Error Syndrome Register) */
-	mtsdram(SDRAM0_BESR0, 0xffffffff);
-
-	/* Clear SDRAM0_BESR1 (Bus Error Syndrome Register) */
-	mtsdram(SDRAM0_BESR1, 0xffffffff);
-
-	/* Clear SDRAM0_ECCCFG (disable ECC) */
-	mtsdram(SDRAM0_ECCCFG, 0x00000000);
-
-	/* Clear SDRAM0_ECCESR (ECC Error Syndrome Register) */
-	mtsdram(SDRAM0_ECCESR, 0xffffffff);
-
-	/* Timing register: CASL=2, PTA=2, CTP=2, LDF=1, RFTA=5, RCD=2
-	 */
-	mtsdram(SDRAM0_TR, 0x008a4015);
-
-	/* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1
-	 * and refresh timer
-	 */
-	switch (dram_size >> 20) {
-	case 32:
-		mtsdram(SDRAM0_B0CR, 0x00062001);
-		mtsdram(SDRAM0_RTR,   0x07F00000);
-		break;
-	case 64:
-		mtsdram(SDRAM0_B0CR, 0x00084001);
-		mtsdram(SDRAM0_RTR,   0x04100000);
-		break;
-	case 128:
-		mtsdram(SDRAM0_B0CR, 0x000A4001);
-		mtsdram(SDRAM0_RTR,   0x04100000);
-		break;
-	default:
-		printf("Invalid memory size of %d MB given\n", dram_size >> 20);
-	}
-
-	/* Power management idle timer set to the default. */
-	mtsdram(SDRAM0_PMIT, 0x07c00000);
-
-	udelay (500);
-
-	/* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) TODO */
-	mtsdram(SDRAM0_CFG, 0x90800000);
-
-#ifdef DEBUG
-	printf("%s: done\n", __FUNCTION__);
-#endif
-	return dram_size;
-}
diff --git a/board/netstal/common/nm.h b/board/netstal/common/nm.h
deleted file mode 100644
index 3dff1d6..0000000
--- a/board/netstal/common/nm.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- *(C) Copyright 2005-2007 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-extern void hcu_led_set(u32 value);
-extern u32 get_serial_number(void);
-extern u32 hcu_get_slot(void);
-extern int board_with_pci(void);
-extern void nm_show_print(int generation, int index, int hw_capabilities);
-extern void set_params_for_sw_install(int install_requested, char *board_name );
-extern void common_misc_init_r(void);
-
-enum {
-	/* HW_GENERATION_HCU1/2 is no longer supported */
-	HW_GENERATION_HCU3  = 0x10,
-	HW_GENERATION_HCU4  = 0x20,
-	HW_GENERATION_HCU5  = 0x30,
-	HW_GENERATION_MCU   = 0x08,
-	HW_GENERATION_MCU20 = 0x0a,
-	HW_GENERATION_MCU25 = 0x09,
-};
-
-#ifdef CONFIG_405GP
-#if defined(DEBUG)
-void show_sdram_registers(void);
-#endif
-long int init_ppc405_sdram(unsigned int dram_size);
-#endif
diff --git a/board/netstal/common/nm_bsp.c b/board/netstal/common/nm_bsp.c
deleted file mode 100644
index 237f4ed..0000000
--- a/board/netstal/common/nm_bsp.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- *(C) Copyright 2005-2008 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <net.h>
-#include "nm.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define DEFAULT_ETH_ADDR  "ethaddr"
-
-typedef struct {u8	id;	char *name;} generation_info;
-
-generation_info generations[6] = {
-	{HW_GENERATION_HCU3,	"HCU3"},
-	{HW_GENERATION_HCU4,	"HCU4"},
-	{HW_GENERATION_HCU5,	"HCU5"},
-	{HW_GENERATION_MCU,	"MCU"},
-	{HW_GENERATION_MCU20,	"MCU20"},
-	{HW_GENERATION_MCU25,	"MCU25"},
-};
-
-void nm_show_print(int generation, int index, int hw_capabilities)
-{
-	int j;
-	char *generationName=0;
-
-	/* reset ANSI terminal color mode */
-	printf("\x1B""[0m""Netstal Maschinen AG: ");
-	for (j=0; j < (sizeof(generations)/sizeof(generations[0])); j++) {
-		if (generations[j].id == generation) {
-			generationName = generations[j].name;
-			break;
-		}
-	}
-	printf("%s: index %d HW 0x%x\n", generationName, index, hw_capabilities);
-	for (j = 0;j < 6; j++) {
-		hcu_led_set(1 << j);
-		udelay(200 * 1000);
-	}
-}
-
-void set_params_for_sw_install(int install_requested, char *board_name )
-{
-	if (install_requested) {
-		char string[128];
-
-		printf("\n\n%s SW-Installation: %d patching boot parameters\n",
-		       board_name, install_requested);
-		setenv("bootdelay", "0");
-		setenv("loadaddr", "0x01000000");
-		setenv("serverip", "172.25.1.1");
-		setenv("bootcmd", "run install");
-		sprintf(string, "tftp ${loadaddr} admin/sw_on_hd; "
-			"tftp ${loadaddr} installer/%s_sw_inst; "
-			"run boot_sw_inst", board_name);
-		setenv("install", string);
-		sprintf(string, "setenv bootargs emac(0,0)c:%s/%s_sw_inst "
-			"e=${ipaddr} h=${serverip} f=0x1000; "
-			"bootvx ${loadaddr}%c",
-			board_name, board_name, 0);
-		setenv("boot_sw_inst", string);
-	}
-}
-
-void common_misc_init_r(void)
-{
-	IPaddr_t ipaddr;
-	char *ipstring;
-	uchar ethaddr[6];
-
-	if (!eth_getenv_enetaddr(DEFAULT_ETH_ADDR, ethaddr)) {
-		/* Must be in sync with CONFIG_ETHADDR */
-		u32 serial = get_serial_number();
-		ethaddr[0] = 0x00;
-		ethaddr[1] = 0x60;
-		ethaddr[2] = 0x13;
-		ethaddr[3] = (serial >> 16) & 0xff;
-		ethaddr[4] = (serial >>  8) & 0xff;
-		ethaddr[5] = hcu_get_slot();
-		eth_setenv_enetaddr(DEFAULT_ETH_ADDR, ethaddr);
-	}
-
-	/* IP-Adress update */
-	ipstring = getenv("ipaddr");
-	if (ipstring == 0)
-		ipaddr = string_to_ip("172.25.1.99");
-	else
-		ipaddr = string_to_ip(ipstring);
-	if ((ipaddr & 0xff) != (32 + hcu_get_slot())) {
-		char tmp[22];
-
-		ipaddr = (ipaddr & 0xffffff00) + 32 + hcu_get_slot();
-		ip_to_string (ipaddr, tmp);
-		printf("%s: enforce %s\n",  __FUNCTION__, tmp);
-		setenv("ipaddr", tmp);
-		saveenv();
-	}
-}
diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile
deleted file mode 100644
index a983de9..0000000
--- a/board/netstal/hcu4/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2007-2008 Netstal Maschinen AG
-# Niklaus Giger (ng@netstal.com)
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o \
-	../common/fixed_sdram.o \
-	../common/nm_bsp.o
-
-SRCS	:= $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $^)
-
-clean:
-	rm -f $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/netstal/hcu4/README.txt b/board/netstal/hcu4/README.txt
deleted file mode 100644
index 1e9c64a..0000000
--- a/board/netstal/hcu4/README.txt
+++ /dev/null
@@ -1,59 +0,0 @@
-HCU4 Configuration Details
-
-Memory Bank 0 -- Flash chip
----------------------------
-
-0xfff00000 - 0xffffffff
-
-The flash chip is really only 512Kbytes, but the high address bit of
-the 1Meg region is ignored, so the flash is replicated through the
-region. Thus, this is consistent with a flash base address 0xfff80000.
-
-The placement at the end is to be consistent with reset behavior,
-where the processor itself initially uses this bus to load the branch
-vector and start running.
-
-On-Chip Memory
---------------
-
-0xf4000000 - 0xf4000fff
-
-The 405GPr includes a 4K on-chip memory that can be placed however
-software chooses. I choose to place the memory at this address, to
-keep it out of the cachable areas.
-
-
-Internal Peripherals
---------------------
-
-0xef600300 - 0xef6008ff
-
-These are scattered various peripherals internal to the PPC405GPr
-chip.
-
-Chip-Select 2: Flash Memory
----------------------------
-
-0x70000000
-
-Chip-Select 3: CAN Interface
-----------------------------
-0x7800000
-
-
-Chip-Select 4: IMC-bus standard
--------------------------------
-
-Our IO-Bus (slow version)
-
-
-Chip-Select 5: IMC-bus fast (inactive)
---------------------------------------
-
-Our IO-Bus (fast, but not yet use)
-
-
-Memory Bank 1 -- SDRAM
--------------------------------------
-
-0x00000000 - 0x1ffffff   # Default 32 MB
diff --git a/board/netstal/hcu4/config.mk b/board/netstal/hcu4/config.mk
deleted file mode 100644
index fd3e889..0000000
--- a/board/netstal/hcu4/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2005 Netstal Maschinen AG
-#     Niklaus Giger (ng@netstal.com)
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Netstal Maschinen AG: HCU4 boards
-#
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG -g
-endif
diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c
deleted file mode 100644
index aaf3616..0000000
--- a/board/netstal/hcu4/hcu4.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/*
- *(C) Copyright 2005-2008 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#include  <common.h>
-#include  <asm/ppc4xx.h>
-#include  <asm/processor.h>
-#include  <asm/io.h>
-#include  <asm/u-boot.h>
-#include  "../common/nm.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define HCU_MACH_VERSIONS_REGISTER	(0x7C000000 + 0xF00000)
-#define HCU_SLOT_ADDRESS		(0x7C000000 + 0x400000)
-#define HCU_DIGITAL_IO_REGISTER		(0x7C000000 + 0x500000)
-#define HCU_SW_INSTALL_REQUESTED	0x10
-
-/*
- * This function is run very early, out of flash, and before devices are
- * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
- * of being in the init_sequence array.
- *
- * The SDRAM has been initialized already -- start.S:start called
- * init.S:init_sdram early on -- but it is not yet being used for
- * anything, not even stack. So be careful.
- */
-
-/* Attention: If you want 1 microsecs times from the external oscillator
- * 0x00004051 is okay for u-boot/linux, but different from old vxworks values
- * 0x00804051 causes problems with u-boot and linux!
- */
-#define CPC0_CR0_VALUE	0x0030103c
-#define CPC0_CR1_VALUE	0x00004051
-
-int board_early_init_f (void)
-{
-	/*
-	 * Interrupt controller setup for the HCU4 board.
-	 * Note: IRQ 0-15  405GP internally generated; high; level sensitive
-	 *       IRQ 16    405GP internally generated; low; level sensitive
-	 *      IRQ 17-24 RESERVED/UNUSED
-	 *      IRQ 31 (EXT IRQ 6) (unused)
-	 */
-	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
-	mtdcr(UIC0ER, 0x00000000); /* disable all ints */
-	mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
-	mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
-	mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
-	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
-
-	mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
-	mtdcr(CPC0_ECR, 0x60606000);
-	mtdcr(CPC0_EIRR, 0x7C000000);
-
-	return 0;
-}
-
-#ifdef CONFIG_BOARD_PRE_INIT
-int board_pre_init (void)
-{
-	return board_early_init_f ();
-}
-#endif
-
-int sys_install_requested(void)
-{
-	u16 ioValue = in_be16((u16 *)HCU_DIGITAL_IO_REGISTER);
-	return (ioValue & HCU_SW_INSTALL_REQUESTED) != 0;
-}
-
-int checkboard (void)
-{
-	u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
-	u16 generation = boardVersReg & 0xf0;
-	u16 index      = boardVersReg & 0x0f;
-
-	/* Cannot be done in board_early_init */
-	mtdcr(CPC0_CR0,  CPC0_CR0_VALUE);
-
-	/* Force /RTS to active. The board it not wired quite
-	 *  correctly to use cts/rtc flow control, so just force the
-	 *  /RST active and forget about it.
-	 */
-	writeb (readb (0xef600404) | 0x03, 0xef600404);
-	nm_show_print(generation, index, 0);
-
-	return 0;
-}
-
-u32 hcu_led_get(void)
-{
-	return (~(in_be32((u32 *)GPIO0_OR)) >> 23) & 0xff;
-}
-
-/*
- * hcu_led_set  value to be placed into the LEDs (max 6 bit)
- */
-void hcu_led_set(u32 value)
-{
-	u32   tmp = ~value;
-
-	tmp = (tmp << 23) | 0x7FFFFF;
-	out_be32((u32 *)GPIO0_OR, tmp);
-}
-
-/*
- * hcu_get_slot
- */
-u32 hcu_get_slot(void)
-{
-	u16 slot = in_be16((u16 *)HCU_SLOT_ADDRESS);
-	return slot & 0x7f;
-}
-
-/*
- * get_serial_number
- */
-u32 get_serial_number(void)
-{
-	u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
-
-	if (serial == 0xffffffff)
-		return 0;
-
-	return serial;
-}
-
-
-/*
- * misc_init_r.
- */
-
-int misc_init_r(void)
-{
-	common_misc_init_r();
-	set_params_for_sw_install( sys_install_requested(), "hcu4" );
-	return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
-	long dram_size = 0;
-	u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
-	u16 generation = boardVersReg & 0xf0;
-	u16 index      = boardVersReg & 0x0f;
-
-	if (generation == HW_GENERATION_HCU3 && index < 0xf)
-		dram_size = 32 << 20;	/* 32 MB - RAM */
-	else
-		dram_size = 64 << 20;	/* 64 MB - RAM */
-	init_ppc405_sdram(dram_size);
-
-#ifdef DEBUG
-	show_sdram_registers();
-#endif
-
-	return dram_size;
-}
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
-
-/*
- * Hardcoded flash setup:
- * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
- */
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
-{
-	if (banknum == 0) {	/* non-CFI boot flash */
-		info->portwidth = 1;
-		info->chipwidth = 1;
-		info->interface = FLASH_CFI_X8;
-		return 1;
-	} else
-		return 0;
-}
diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile
deleted file mode 100644
index 280c2f6..0000000
--- a/board/netstal/hcu5/Makefile
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# (C) Copyright 2007-2008 Netstal Maschinen AG
-# Niklaus Giger (ng@netstal.com)
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o \
-	sdram.o \
-	../common/nm_bsp.o
-SOBJS	= init.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-all:	$(LIB) $(SOBJS)
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $^)
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/netstal/hcu5/README.txt b/board/netstal/hcu5/README.txt
deleted file mode 100644
index c5737d0..0000000
--- a/board/netstal/hcu5/README.txt
+++ /dev/null
@@ -1,171 +0,0 @@
-HCU5 configuration details and startup sequence
-
-(C) Copyright 2007 Netstal Maschinen AG
-    Niklaus Giger (Niklaus.Giger@netstal.com)
-
-TODO:
------
-- Fix error: Waiting for PHY auto negotiation to complete..... TIMEOUT !
-     - Does not occur if both EMAC are connected
-- Fix RTS/CTS problem (HW?)
-  CONFIG_SERIAL_MULTI/CONFIG_SERIAL_SOFTWARE_FIFO hangs after
-  Switching to interrupt driven serial input mode
-
-Caveats:
---------
-Errata CHIP_8: Incorrect Write to DDR SDRAM. (was not applied to sequoia.c)
-see hcu5.c.
-
-
-Memory Bank 0 -- Flash chip
----------------------------
-
-0xfff00000 - 0xffffffff
-
-The flash chip is really only 512Kbytes, but the high address bit of
-the 1Meg region is ignored, so the flash is replicated through the
-region. Thus, this is consistent with a flash base address 0xfff80000.
-
-The placement at the end is to be consistent with reset behavior,
-where the processor itself initially uses this bus to load the branch
-vector and start running.
-
-On-Chip Memory
---------------
-
-0xe0010000- 0xe0013fff   CONFIG_SYS_OCM_BASE
-The 440EPx includes a 16K on-chip memory that can be placed however
-software chooses.
-
-Internal Peripherals
---------------------
-
-0xef600300 - 0xef6008ff
-
-These are scattered various peripherals internal to the PPC440EPX
-chip.
-
-Chip-Select 2: Flash Memory
----------------------------
-
-Not used
-
-Chip-Select 3: CAN Interface
-----------------------------
-0xc800000: 2 Intel 82527 CAN-Controller
-
-
-Chip-Select 4: IMC-bus standard
--------------------------------
-
-0xcc00000: Netstal specific IO-Bus
-
-
-Chip-Select 5: IMC-bus fast (inactive)
---------------------------------------
-
-0xce00000: Netstal specific IO-Bus (fast, but not yet used)
-
-
-Memory Bank 1 -- DDR2
--------------------------------------
-
-0x00000000 - 0xfffffff   # Default 256 MB
-
-PCI ??
-
-USB ??
-Only USB_STORAGE is enabled to load vxWorks
-from a memory stick.
-
-System-LEDs ??? (Analog zu HCU4 ???)
-
-Startup sequence
-----------------
-
-(arch/powerpc/cpu/ppc4xx/resetvec.S)
-depending on configs option
-call _start_440 _start_pci oder _start
-
-(arch/powerpc/cpu/ppc4xx/start.S)
-
-_start_440:
-	initialize register like
-	CCR0
-	debug
-	setup interrupt vectors
-	configure cache regions
-	clear and setup TLB
-	enable internal RAM
-	jump start_ram
-	which in turn will jump to start
-_start:
-	Clear and set up some registers.
-	Debug setup
-	Setup the internal SRAM
-	Setup the stack in internal SRAM
-    setup stack pointer (r1)
-    setup GOT
-	call cpu_init_f	/* run low-level CPU init code	   (from Flash) */
-
-    call cpu_init_f
-    board_init_f: (arch/powerpc/lib\board.c)
-	init_sequence defines a list of function to be called
-	    board_early_init_f: (board/netstal/hcu5/hcu5.c)
-		We are using Bootstrap-Option A
-		if CPR0_ICFG_RLI_MASK == 0 then set some registers and reboot
-		Setup the GPIO pins
-		Setup the interrupt controller polarities, triggers, etc.
-		Ethernet, PCI, USB enable
-		setup BOOT FLASH (Chip timing)
-	    init_baudrate,
-	    serial_init
-	    checkcpu
-	    misc_init_f #ifdef
-	    init_func_i2c #ifdef
-	    post_init_f  #ifdef
-	    init_func_ram -> calls init_dram board/netstal/hcu5/sdram.c
-		(EYE function removed!!)
-	    test_dram call
-
-	 * Reserve memory at end of RAM for (top down in that order):
-	 *  - kernel log buffer
-	 *  - protected RAM
-	 *  - LCD framebuffer
-	 *  - monitor code
-	 *  - board info struct
-	Save local variables to board info struct
-	call relocate_code() does not return
-	relocate_code: (arch/powerpc/cpu/ppc4xx/start.S)
--------------------------------------------------------
-From now on our copy is in RAM and we will run from there,
-	starting with board_init_r
--------------------------------------------------------
-    board_init_r: (arch/powerpc/lib\board.c)
-	setup bd function pointers
-	trap_init
-	flash_init: (board/netstal/hcu5/flash.c)
-		/* setup for u-boot erase, update */
-	setup bd flash info
-	cpu_init_r: (arch/powerpc/cpu/ppc4xx/cpu_init.c)
-	    peripheral chip select in using defines like
-	    CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h
-	mem_malloc_init
-	malloc_bin_reloc
-	spi_init (r or f)??? (CONFIG_ENV_IS_IN_EEPROM)
-	env_relocated
-	misc_init_r(bd): (board/netstal/hcu5.c)
-	    ethaddr mit serial number ergänzen
-    Then we will somehow go into the command loop
-
-Most of the HW specific code for the HCU5 may be found in
-include/configs/hcu5.h
-board/netstal/hcu5/*
-arch/powerpc/cpu/ppc4xx/*
-arch/powerpc/lib/*
-include/ppc440.h
-
-Drivers for serial etc are found under drivers/
-
-Don't ask question if you did not look at the README !!
-Most CONFIG_SYS_* and CONFIG_* switches are mentioned/explained there.
diff --git a/board/netstal/hcu5/config.mk b/board/netstal/hcu5/config.mk
deleted file mode 100644
index f641d54..0000000
--- a/board/netstal/hcu5/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2005 Netstal Maschinen AG
-#     Niklaus Giger (ng@netstal.com)
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Netstal Maschinen AG: HCU5 boards
-#
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG -g
-endif
diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c
deleted file mode 100644
index f94d05b..0000000
--- a/board/netstal/hcu5/hcu5.c
+++ /dev/null
@@ -1,414 +0,0 @@
-/*
- *(C) Copyright 2005-2008 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/ppc440.h>
-#include <asm/io.h>
-#include <asm/4xx_pci.h>
-
-#include  "../common/nm.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-#undef BOOTSTRAP_OPTION_A_ACTIVE
-
-#define SDR0_CP440		0x0180
-
-#define SYSTEM_RESET		0x30000000
-#define CHIP_RESET		0x20000000
-
-#define SDR0_ECID0		0x0080
-#define SDR0_ECID1		0x0081
-#define SDR0_ECID2		0x0082
-#define SDR0_ECID3		0x0083
-
-#define SYS_IO_ADDRESS			(CONFIG_SYS_CS_2 + 0x00e00000)
-#define SYS_SLOT_ADDRESS		(CONFIG_SYS_CPLD + 0x00400000)
-#define HCU_DIGITAL_IO_REGISTER	(CONFIG_SYS_CPLD + 0x0500000)
-#define HCU_SW_INSTALL_REQUESTED	0x10
-
-/*
- * This function is run very early, out of flash, and before devices are
- * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
- * of being in the init_sequence array.
- *
- * The SDRAM has been initialized already -- start.S:start called
- * init.S:init_sdram early on -- but it is not yet being used for
- * anything, not even stack. So be careful.
- */
-
-int board_early_init_f(void)
-{
-
-#ifdef BOOTSTRAP_OPTION_A_ACTIVE
-	/* Booting with Bootstrap Option A
-	 * First boot, with CPR0_ICFG_RLI_MASK == 0
-	 * no we setup varios boot strapping register,
-	 * then we do reset the PPC440 using a chip reset
-	 * Unfortunately, we cannot use this option, as Nto1 is not set
-	 * with Bootstrap Option A and cannot be changed later on by SW
-	 * There are no other possible boostrap options with a 8 bit ROM
-	 * See Errata (Version 1.04) CHIP_9
-	 */
-
-	u32 cpr0icfg;
-	u32 dbcr;
-
-	mfcpr(CPR0_ICFG, cpr0icfg);
-	if (!(cpr0icfg & CPR0_ICFG_RLI_MASK)) {
-		mtcpr(CPR0_MALD,   0x02000000);
-		mtcpr(CPR0_OPBD,   0x02000000);
-	        mtcpr(CPR0_PERD,   0x05000000);  /* 1:5 */
-		mtcpr(CPR0_PLLC,   0x40000238);
-		mtcpr(CPR0_PLLD,   0x01010414);
-		mtcpr(CPR0_PRIMAD, 0x01000000);
-		mtcpr(CPR0_PRIMBD, 0x01000000);
-		mtcpr(CPR0_SPCID,  0x03000000);
-		mtsdr(SDR0_PFC0,   0x00003E00);  /* [CTE] = 0 */
-		mtsdr(SDR0_CP440,  0x0EAAEA02);  /* [Nto1] = 1*/
-		mtcpr(CPR0_ICFG,   cpr0icfg | CPR0_ICFG_RLI_MASK);
-
-		/*
-		 * Initiate system reset in debug control register DBCR
-		 */
-		dbcr = mfspr(SPRN_DBCR0);
-		mtspr(SPRN_DBCR0, dbcr | CHIP_RESET);
-	}
-	mtsdr(SDR0_CP440, 0x0EAAEA02);  /* [Nto1] = 1*/
-#endif
-	mtdcr(EBC0_CFGADDR, EBC0_CFG);
-	mtdcr(EBC0_CFGDATA, 0xb8400000);
-
-	/*
-	 * Setup the GPIO pins
-	 */
-	out32(GPIO0_OR, 0x00000000);
-	out32(GPIO0_TCR, 0x7C2FF1CF);
-	out32(GPIO0_OSRL, 0x40055000);
-	out32(GPIO0_OSRH, 0x00000000);
-	out32(GPIO0_TSRL, 0x40055000);
-	out32(GPIO0_TSRH, 0x00000400);
-	out32(GPIO0_ISR1L, 0x40000000);
-	out32(GPIO0_ISR1H, 0x00000000);
-	out32(GPIO0_ISR2L, 0x00000000);
-	out32(GPIO0_ISR2H, 0x00000000);
-	out32(GPIO0_ISR3L, 0x00000000);
-	out32(GPIO0_ISR3H, 0x00000000);
-
-	out32(GPIO1_OR, 0x00000000);
-	out32(GPIO1_TCR, 0xC6007FFF);
-	out32(GPIO1_OSRL, 0x00140000);
-	out32(GPIO1_OSRH, 0x00000000);
-	out32(GPIO1_TSRL, 0x00000000);
-	out32(GPIO1_TSRH, 0x00000000);
-	out32(GPIO1_ISR1L, 0x05415555);
-	out32(GPIO1_ISR1H, 0x40000000);
-	out32(GPIO1_ISR2L, 0x00000000);
-	out32(GPIO1_ISR2H, 0x00000000);
-	out32(GPIO1_ISR3L, 0x00000000);
-	out32(GPIO1_ISR3H, 0x00000000);
-
-	/*
-	 * Setup the interrupt controller polarities, triggers, etc.
-	 */
-	mtdcr(UIC0SR, 0xffffffff);	/* clear all */
-	mtdcr(UIC0ER, 0x00000000);	/* disable all */
-	mtdcr(UIC0CR, 0x00000005);	/* ATI & UIC1 crit are critical */
-	mtdcr(UIC0PR, 0xfffff7ff);	/* per ref-board manual */
-	mtdcr(UIC0TR, 0x00000000);	/* per ref-board manual */
-	mtdcr(UIC0VR, 0x00000000);	/* int31 highest, base=0x000 */
-	mtdcr(UIC0SR, 0xffffffff);	/* clear all */
-
-	mtdcr(UIC1SR, 0xffffffff);	/* clear all */
-	mtdcr(UIC1ER, 0x00000000);	/* disable all */
-	mtdcr(UIC1CR, 0x00000000);	/* all non-critical */
-	mtdcr(UIC1PR, 0xffffffff);	/* per ref-board manual */
-	mtdcr(UIC1TR, 0x00000000);	/* per ref-board manual */
-	mtdcr(UIC1VR, 0x00000000);	/* int31 highest, base=0x000 */
-	mtdcr(UIC1SR, 0xffffffff);	/* clear all */
-
-	mtdcr(UIC2SR, 0xffffffff);	/* clear all */
-	mtdcr(UIC2ER, 0x00000000);	/* disable all */
-	mtdcr(UIC2CR, 0x00000000);	/* all non-critical */
-	mtdcr(UIC2PR, 0xffffffff);	/* per ref-board manual */
-	mtdcr(UIC2TR, 0x00000000);	/* per ref-board manual */
-	mtdcr(UIC2VR, 0x00000000);	/* int31 highest, base=0x000 */
-	mtdcr(UIC2SR, 0xffffffff);	/* clear all */
-	mtsdr(SDR0_PFC0, 0x00003E00);	/* Pin function:  */
-	mtsdr(SDR0_PFC1, 0x00848000);	/* Pin function: UART0 has 4 pins */
-
-	/* setup BOOT FLASH */
-	mtsdr(SDR0_CUST0, 0xC0082350);
-
-	return 0;
-}
-
-#ifdef CONFIG_BOARD_PRE_INIT
-int board_pre_init(void)
-{
-	return board_early_init_f();
-}
-
-#endif
-
-int sys_install_requested(void)
-{
-	u16 *ioValuePtr = (u16 *)HCU_DIGITAL_IO_REGISTER;
-	return (in_be16(ioValuePtr) & HCU_SW_INSTALL_REQUESTED) != 0;
-}
-
-int checkboard(void)
-{
-	u16 *hwVersReg    = (u16 *) HCU_HW_VERSION_REGISTER;
-	u16 *boardVersReg = (u16 *) HCU_CPLD_VERSION_REGISTER;
-	u16 generation = in_be16(boardVersReg) & 0xf0;
-	u16 index      = in_be16(boardVersReg) & 0x0f;
-	u32 ecid0, ecid1, ecid2, ecid3;
-
-	nm_show_print(generation, index, in_be16(hwVersReg) & 0xff);
-	mfsdr(SDR0_ECID0, ecid0);
-	mfsdr(SDR0_ECID1, ecid1);
-	mfsdr(SDR0_ECID2, ecid2);
-	mfsdr(SDR0_ECID3, ecid3);
-
-	printf("Chip ID 0x%x 0x%x 0x%x 0x%x\n", ecid0, ecid1, ecid2, ecid3);
-
-	return 0;
-}
-
-u32 hcu_led_get(void)
-{
-	return in16(SYS_IO_ADDRESS) & 0x3f;
-}
-
-/*
- * hcu_led_set  value to be placed into the LEDs (max 6 bit)
- */
-void hcu_led_set(u32 value)
-{
-	out16(SYS_IO_ADDRESS, value);
-}
-
-/*
- * get_serial_number
- */
-u32 get_serial_number(void)
-{
-	u32 *serial = (u32 *)CONFIG_SYS_FLASH_BASE;
-
-	if (in_be32(serial) == 0xffffffff)
-		return 0;
-
-	return in_be32(serial);
-}
-
-
-/*
- * hcu_get_slot
- */
-u32 hcu_get_slot(void)
-{
-	u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
-	return in_be16(slot) & 0x7f;
-}
-
-
-/*
- * misc_init_r.
- */
-int misc_init_r(void)
-{
-	unsigned long usb2d0cr = 0;
-	unsigned long usb2phy0cr, usb2h0cr = 0;
-	unsigned long sdr0_pfc1;
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-	/* Monitor protection ON by default */
-	(void)flash_protect(FLAG_PROTECT_SET,
-			    -CONFIG_SYS_MONITOR_LEN,
-			    0xffffffff,
-			    &flash_info[0]);
-
-#ifdef CONFIG_ENV_ADDR_REDUND
-	/* Env protection ON by default */
-	(void)flash_protect(FLAG_PROTECT_SET,
-			    CONFIG_ENV_ADDR_REDUND,
-			    CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
-			    &flash_info[0]);
-#endif
-#endif
-
-	/*
-	 * USB stuff...
-	 */
-
-	/* SDR Setting */
-	mfsdr(SDR0_PFC1, sdr0_pfc1);
-	mfsdr(SDR0_USB2D0CR, usb2d0cr);
-	mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
-	mfsdr(SDR0_USB2H0CR, usb2h0cr);
-
-	usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
-	usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;	/*0*/
-	usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
-	usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ;	/*1*/
-	usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
-	usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;		/*0*/
-	usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
-	usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;		/*1*/
-	usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
-	usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;		/*1*/
-
-	/* An 8-bit/60MHz interface is the only possible alternative
-	 *  when connecting the Device to the PHY
-	 */
-	usb2h0cr   = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
-	usb2h0cr   = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ;	/*1*/
-
-	/* To enable the USB 2.0 Device function through the UTMI interface */
-	usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
-	usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION;		/*1*/
-
-	sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
-	sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL;		/*0*/
-
-	mtsdr(SDR0_PFC1, sdr0_pfc1);
-	mtsdr(SDR0_USB2D0CR, usb2d0cr);
-	mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
-	mtsdr(SDR0_USB2H0CR, usb2h0cr);
-
-	/*clear resets*/
-	udelay(1000);
-	mtsdr(SDR0_SRST1, 0x00000000);
-	udelay(1000);
-	mtsdr(SDR0_SRST0, 0x00000000);
-	printf("USB:   Host(int phy) Device(ext phy)\n");
-
-	common_misc_init_r();
-	set_params_for_sw_install( sys_install_requested(), "hcu5" );
-	/* We cannot easily enable trace before, as there are other
-	 * routines messing around with sdr0_pfc1. And I do not need it.
-	 */
-	if (mfspr(SPRN_DBCR0) & 0x80000000) {
-		/* External debugger alive
-		 * enable trace facilty for Lauterbach
-		 * CCR0[DTB]=0		Enable broadcast of trace information
-		 * SDR0_PFC0[TRE]	Trace signals are enabled instead of
-		 *			GPIO49-63
-		 */
-	        mtspr(SPRN_CCR0, mfspr(SPRN_CCR0)  &~ (CCR0_DTB));
-		mtsdr(SDR0_PFC0, sdr0_pfc1 | SDR0_PFC0_TRE_ENABLE);
-	}
-	return 0;
-}
-#ifdef CONFIG_PCI
-int board_with_pci(void)
-{
-	u32 reg;
-
-	mfsdr(SDR0_PCI0, reg);
-	return (reg & SDR0_PCI0_PAE_MASK);
-}
-
-/*
- *  pci_pre_init
- *
- *  This routine is called just prior to registering the hose and gives
- *  the board the opportunity to check things. Returning a value of zero
- *  indicates that things are bad & PCI initialization should be aborted.
- *
- *	Different boards may wish to customize the pci controller structure
- *	(add regions, override default access routines, etc) or perform
- *	certain pre-initialization actions.
- *
- */
-int pci_pre_init(struct pci_controller *hose)
-{
-	unsigned long addr;
-
-	if (!board_with_pci()) { return 0; }
-
-	/*
-	 * Set priority for all PLB3 devices to 0.
-	 * Set PLB3 arbiter to fair mode.
-	 */
-	mfsdr(SDR0_AMP1, addr);
-	mtsdr(SDR0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
-	addr = mfdcr(PLB3A0_ACR);
-	mtdcr(PLB3A0_ACR, addr | 0x80000000); /* Sequoia */
-
-	/*
-	 * Set priority for all PLB4 devices to 0.
-	 */
-	mfsdr(SDR0_AMP0, addr);
-	mtsdr(SDR0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
-	addr = mfdcr(PLB4A0_ACR) | 0xa0000000;	/* Was 0x8---- */
-	mtdcr(PLB4A0_ACR, addr);  /* Sequoia */
-
-	/*
-	 * As of errata version 0.4, CHIP_8: Incorrect Write to DDR SDRAM.
-	 * Workaround: Disable write pipelining to DDR SDRAM by setting
-	 * PLB4A0_ACR[WRP] = 0.
-	 */
-	mtdcr(PLB4A0_ACR, 0);  /* PATCH HAB: WRITE PIPELINING OFF */
-
-	/* Segment1 */
-	mtdcr(PLB4A1_ACR, 0);  /* PATCH HAB: WRITE PIPELINING OFF */
-
-	return board_with_pci();
-}
-
-/*
- * Override weak default pci_master_init()
- */
-void pci_master_init(struct pci_controller *hose)
-{
-	if (!board_with_pci())
-		return;
-
-	__pci_master_init(hose);
-}
-#endif	 /* defined(CONFIG_PCI) */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
-
-/*
- * Hardcoded flash setup:
- * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
- */
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
-{
-	if (banknum == 0) {	/* non-CFI boot flash */
-		info->portwidth = 1;
-		info->chipwidth = 1;
-		info->interface = FLASH_CFI_X8;
-		return 1;
-	} else
-		return 0;
-}
diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S
deleted file mode 100644
index 45e63dd..0000000
--- a/board/netstal/hcu5/init.S
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <config.h>
-#include <asm/mmu.h>
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- *  Pointer to the table is returned in r1
- *
- *************************************************************************/
-	.section .bootpg,"ax"
-	.globl tlbtab
-
-tlbtab:
-	tlbtab_start
-
-	/* TLB#0: vxWorks needs this entry for the Machine Check interrupt, */
-	tlbentry( 0x40000000, SZ_256M, 0, 0, AC_RWX | SA_IG )
-	/* TLB#1: TLB-entry for DDR SDRAM (Up to 2GB) */
-	tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0,
-		AC_RWX | SA_IG )
-
-	/* TLB#2: TLB-entry for EBC */
-	tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_RWX | SA_IG)
-
-	/*
-	 * TLB#3: BOOT_CS (FLASH) must be forth. Before relocation SA_I can be
-	 * off to use the speed up boot process. It is patched after relocation
-	 * to enable SA_I
-	 */
-	tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_1M, CONFIG_SYS_BOOT_BASE_ADDR, 1,
-		AC_RWX | SA_G)
-
-	/*
-	 * TLB entries for SDRAM are not needed on this platform.
-	 * They are dynamically generated in the SPD DDR(2) detection
-	 * routine.
-	 */
-
-	/* TLB#4: */
-	tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1,
-		AC_RW | SA_IG )
-	/* TLB#5: */
-	tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1,
-		AC_RW | SA_IG )
-	/* TLB#6: */
-	tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1,
-		AC_RW | SA_IG )
-
-	/* TLB-entry for Internal Registers & OCM */
-	/* TLB#7: */
-	tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0,
-		AC_RWX | SA_IG )
-
-	/*TLB-entry PCI registers*/
-	/* TLB#8: */
-	tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1,  AC_RWX | SA_IG )
-
-	/* TLB-entry for peripherals */
-	/* TLB#9: */
-	tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG)
-
-	/*		CAN */
-	/* TLB#10: */
-	tlbentry( CONFIG_SYS_CS_1, SZ_1K, CONFIG_SYS_CS_1, 1, AC_RWX | SA_IG )
-
-	/* TLB#11:  CPLD and IMC-Standard 32 MB */
-	tlbentry( CONFIG_SYS_CS_2, SZ_16M, CONFIG_SYS_CS_2, 1, AC_RWX | SA_IG )
-
-	/* TLB#12: */
-	tlbentry( CONFIG_SYS_CS_2 + 0x1000000, SZ_16M, CONFIG_SYS_CS_2 + 0x1000000, 1,
-		AC_RWX | SA_IG )
-
-	 /*		IMC-Fast 32 MB */
-	/* TLB#13: */
-	tlbentry( CONFIG_SYS_CS_3, SZ_16M, CONFIG_SYS_CS_3, 1, AC_RWX | SA_IG )
-	/* TLB#14: */
-	tlbentry( CONFIG_SYS_CS_3 + 0x1000000, SZ_16M, CONFIG_SYS_CS_3, 1,
-		AC_RWX | SA_IG )
-
-	tlbtab_end
diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c
deleted file mode 100644
index e5ac46b..0000000
--- a/board/netstal/hcu5/sdram.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
- * (C) Copyright 2007
- * Niklaus Giger (Niklaus.Giger@netstal.com)
- * (C) Copyright 2006
- * Sylvie Gohl,             AMCC/IBM, gohl.sylvie@fr.ibm.com
- * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
- * Thierry Roman,           AMCC/IBM, thierry_roman@fr.ibm.com
- * Alain Saurel,            AMCC/IBM, alain.saurel@fr.ibm.com
- * Robert Snyder,           AMCC/IBM, rob.snyder@fr.ibm.com
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* define DEBUG for debug output */
-#undef DEBUG
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/mmu.h>
-#include <asm/cache.h>
-#include <asm/ppc440.h>
-
-void hcu_led_set(u32 value);
-void dcbz_area(u32 start_address, u32 num_bytes);
-
-#define ECC_RAM				0x03267F0B
-#define NO_ECC_RAM			0x00267F0B
-
-#define HCU_HW_SDRAM_CONFIG_MASK	0x7
-
-#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE
-	/* disable caching on DDR2 */
-
-void board_add_ram_info(int use_default)
-{
-	PPC4xx_SYS_INFO board_cfg;
-	u32 val;
-
-	mfsdram(DDR0_22, val);
-	val &= DDR0_22_CTRL_RAW_MASK;
-	switch (val) {
-	case DDR0_22_CTRL_RAW_ECC_DISABLE:
-		puts(" (ECC disabled");
-		break;
-	case DDR0_22_CTRL_RAW_ECC_CHECK_ONLY:
-		puts(" (ECC check only");
-		break;
-	case DDR0_22_CTRL_RAW_NO_ECC_RAM:
-		puts(" (no ECC ram");
-		break;
-	case DDR0_22_CTRL_RAW_ECC_ENABLE:
-		puts(" (ECC enabled");
-		break;
-	}
-
-	get_sys_info(&board_cfg);
-	printf(", %lu MHz", (board_cfg.freqPLB * 2) / 1000000);
-
-	mfsdram(DDR0_03, val);
-	val = DDR0_03_CASLAT_DECODE(val);
-	printf(", CL%d)", val);
-}
-
-/*--------------------------------------------------------------------
- * wait_for_dlllock.
- *--------------------------------------------------------------------*/
-static int wait_for_dlllock(void)
-{
-	unsigned long val;
-	int wait = 0;
-
-	/* -----------------------------------------------------------+
-	 * Wait for the DCC master delay line to finish calibration
-	 * ----------------------------------------------------------*/
-	mtdcr(SDRAM0_CFGADDR, DDR0_17);
-	val = DDR0_17_DLLLOCKREG_UNLOCKED;
-
-	while (wait != 0xffff) {
-		val = mfdcr(SDRAM0_CFGDATA);
-		if ((val & DDR0_17_DLLLOCKREG_MASK) ==
-		    DDR0_17_DLLLOCKREG_LOCKED)
-			/* dlllockreg bit on */
-			return 0;
-		else
-			wait++;
-	}
-	debug("0x%04x: DDR0_17 Value (dlllockreg bit): 0x%08x\n", wait, val);
-	debug("Waiting for dlllockreg bit to raise\n");
-
-	return -1;
-}
-
-/***********************************************************************
- *
- * sdram_panic -- Panic if we cannot configure the sdram correctly
- *
- ************************************************************************/
-void sdram_panic(const char *reason)
-{
-	printf("\n%s: reason %s",  __FUNCTION__,  reason);
-	hcu_led_set(0xff);
-	while (1) {
-	}
-	/* Never return */
-}
-
-#ifdef CONFIG_DDR_ECC
-void blank_string(int size)
-{
-	int i;
-
-	for (i=0; i<size; i++)
-		putc('\b');
-	for (i=0; i<size; i++)
-		putc(' ');
-	for (i=0; i<size; i++)
-		putc('\b');
-}
-/*---------------------------------------------------------------------------+
- * program_ecc.
- *---------------------------------------------------------------------------*/
-static void program_ecc(unsigned long start_address, unsigned long num_bytes)
-{
-	u32 val;
-	char str[] = "ECC generation -";
-#if defined(CONFIG_PRAM)
-	u32 *magicPtr;
-	u32 magic;
-
-	if ((mfspr(SPRN_DBCR0) & 0x80000000) == 0) {
-		/* only if no external debugger is alive!
-		 * Check whether vxWorks is using EDR logging, if yes zero
-		 * also PostMortem and user reserved memory
-		 */
-		magicPtr = (u32 *)(start_address + num_bytes -
-				(CONFIG_PRAM*1024) + sizeof(u32));
-		magic = in_be32(magicPtr);
-		debug("%s:  CONFIG_PRAM %d kB magic 0x%x 0x%p\n",
-		      __FUNCTION__, CONFIG_PRAM,
-		      magicPtr, magic);
-		if (magic == 0xbeefbabe) {
-			printf("%s: preserving at %p\n", __FUNCTION__, magicPtr);
-			num_bytes -= (CONFIG_PRAM*1024) - PM_RESERVED_MEM;
-		}
-	}
-#endif
-
-	sync();
-
-	puts(str);
-
-	/* ECC bit set method for cached memory */
-	/* Fast method, no noticeable delay */
-	dcbz_area(start_address, num_bytes);
-	/* Write modified dcache lines back to memory */
-	clean_dcache_range(start_address, start_address + num_bytes);
-	blank_string(strlen(str));
-
-	/* Clear error status */
-	mfsdram(DDR0_00, val);
-	mtsdram(DDR0_00, val | DDR0_00_INT_ACK_ALL);
-
-	/*
-	 * Clear possible ECC errors
-	 * If not done, then we could get an interrupt later on when
-	 * exceptions are enabled.
-	 */
-	mtspr(SPRN_MCSR, mfspr(SPRN_MCSR));
-
-	/* Set 'int_mask' parameter to functionnal value */
-	mfsdram(DDR0_01, val);
-	mtsdram(DDR0_01, ((val &~ DDR0_01_INT_MASK_MASK) |
-			  DDR0_01_INT_MASK_ALL_OFF));
-
-	return;
-}
-#endif
-
-
-/***********************************************************************
- *
- * initdram -- 440EPx's DDR controller is a DENALI Core
- *
- ************************************************************************/
-phys_size_t initdram (int board_type)
-{
-	unsigned int dram_size = 0;
-
-	mtsdram(DDR0_02, 0x00000000);
-
-	/* Values must be kept in sync with Excel-table <<A0001492.>> ! */
-	mtsdram(DDR0_00, 0x0000190A);
-	mtsdram(DDR0_01, 0x01000000);
-	mtsdram(DDR0_03, 0x02030602);
-	mtsdram(DDR0_04, 0x0A020200);
-	mtsdram(DDR0_05, 0x02020307);
-	switch (in_be16((u16 *)HCU_HW_VERSION_REGISTER) & HCU_HW_SDRAM_CONFIG_MASK) {
-	case 1:
-		dram_size = 256 * 1024 * 1024 ;
-		mtsdram(DDR0_06, 0x0102C812);  /* 256MB RAM */
-		mtsdram(DDR0_11, 0x0014C800);  /* 256MB RAM */
-		mtsdram(DDR0_43, 0x030A0200);  /* 256MB RAM */
-		break;
-	case 0:
-	default:
-		dram_size = 128 * 1024 * 1024 ;
-		mtsdram(DDR0_06, 0x0102C80D);  /* 128MB RAM */
-		mtsdram(DDR0_11, 0x000FC800);  /* 128MB RAM */
-		mtsdram(DDR0_43, 0x030A0300);  /* 128MB RAM */
-		break;
-	}
-	mtsdram(DDR0_07, 0x00090100);
-
-	/*
-	 * TCPD=200 cycles of clock input is required to lock the DLL.
-	 * CKE must be HIGH the entire time.mtsdram(DDR0_08, 0x02C80001);
-	 */
-	mtsdram(DDR0_08, 0x02C80001);
-	mtsdram(DDR0_09, 0x00011D5F);
-	mtsdram(DDR0_10, 0x00000100);
-	mtsdram(DDR0_12, 0x00000003);
-	mtsdram(DDR0_14, 0x00000000);
-	mtsdram(DDR0_17, 0x1D000000);
-	mtsdram(DDR0_18, 0x1D1D1D1D);
-	mtsdram(DDR0_19, 0x1D1D1D1D);
-	mtsdram(DDR0_20, 0x0B0B0B0B);
-	mtsdram(DDR0_21, 0x0B0B0B0B);
-#ifdef CONFIG_DDR_ECC
-	mtsdram(DDR0_22, ECC_RAM);
-#else
-	mtsdram(DDR0_22, NO_ECC_RAM);
-#endif
-
-	mtsdram(DDR0_23, 0x00000000);
-	mtsdram(DDR0_24, 0x01020001);
-	mtsdram(DDR0_26, 0x2D930517);
-	mtsdram(DDR0_27, 0x00008236);
-	mtsdram(DDR0_28, 0x00000000);
-	mtsdram(DDR0_31, 0x00000000);
-	mtsdram(DDR0_42, 0x01000006);
-	mtsdram(DDR0_44, 0x00000003);
-	mtsdram(DDR0_02, 0x00000001);
-	wait_for_dlllock();
-	mtsdram(DDR0_00, 0x40000000);  /* Zero init bit */
-
-	/*
-	 * Program tlb entries for this size (dynamic)
-	 */
-	remove_tlb(CONFIG_SYS_SDRAM_BASE, 256 << 20);
-	program_tlb(0, 0, dram_size, TLB_WORD2_W_ENABLE | TLB_WORD2_I_ENABLE);
-
-	/*
-	 * Setup 2nd TLB with same physical address but different virtual
-	 * address with cache enabled. This is done for fast ECC generation.
-	 */
-	program_tlb(0, CONFIG_SYS_DDR_CACHED_ADDR, dram_size, 0);
-
-#ifdef CONFIG_DDR_ECC
-	/*
-	 * If ECC is enabled, initialize the parity bits.
-	 */
-	program_ecc(CONFIG_SYS_DDR_CACHED_ADDR, dram_size);
-#endif
-
-	return (dram_size);
-}
diff --git a/board/netstal/mcu25/Makefile b/board/netstal/mcu25/Makefile
deleted file mode 100644
index a983de9..0000000
--- a/board/netstal/mcu25/Makefile
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# (C) Copyright 2007-2008 Netstal Maschinen AG
-# Niklaus Giger (ng@netstal.com)
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o \
-	../common/fixed_sdram.o \
-	../common/nm_bsp.o
-
-SRCS	:= $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $^)
-
-clean:
-	rm -f $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/netstal/mcu25/README.txt b/board/netstal/mcu25/README.txt
deleted file mode 100644
index d25fddd..0000000
--- a/board/netstal/mcu25/README.txt
+++ /dev/null
@@ -1,59 +0,0 @@
-MCU25 Configuration Details
-
-Memory Bank 0 -- Flash chip
----------------------------
-
-0xfff00000 - 0xffffffff
-
-The flash chip is really only 512Kbytes, but the high address bit of
-the 1Meg region is ignored, so the flash is replicated through the
-region. Thus, this is consistent with a flash base address 0xfff80000.
-
-The placement at the end is to be consistent with reset behavior,
-where the processor itself initially uses this bus to load the branch
-vector and start running.
-
-On-Chip Memory
---------------
-
-0xf4000000 - 0xf4000fff
-
-The 405GPr includes a 4K on-chip memory that can be placed however
-software chooses. I choose to place the memory at this address, to
-keep it out of the cachable areas.
-
-
-Internal Peripherals
---------------------
-
-0xef600300 - 0xef6008ff
-
-These are scattered various peripherals internal to the PPC405GPr
-chip.
-
-Chip-Select 2: Flash Memory
----------------------------
-
-0x70000000
-
-Chip-Select 3: CAN Interface
-----------------------------
-0x7800000
-
-
-Chip-Select 4: IMC-bus standard
--------------------------------
-
-Our IO-Bus (slow version)
-
-
-Chip-Select 5: IMC-bus fast (inactive)
---------------------------------------
-
-Our IO-Bus (fast, but not yet use)
-
-
-Memory Bank 1 -- SDRAM
--------------------------------------
-
-0x00000000 - 0x2ffffff   # Default 64 MB
diff --git a/board/netstal/mcu25/config.mk b/board/netstal/mcu25/config.mk
deleted file mode 100644
index 61dc091..0000000
--- a/board/netstal/mcu25/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2005 Netstal Maschinen AG
-#     Niklaus Giger (ng@netstal.com)
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# Netstal Maschinen AG: MCU25 board
-#
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG -g
-endif
diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c
deleted file mode 100644
index 36fb388..0000000
--- a/board/netstal/mcu25/mcu25.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- *(C) Copyright 2005-2008 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#include  <common.h>
-#include  <asm/ppc4xx.h>
-#include  <asm/processor.h>
-#include  <asm/io.h>
-#include  <asm/u-boot.h>
-#include  "../common/nm.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define MCU25_SLOT_ADDRESS		(0x7A000000 + 0x0A)
-#define MCU25_DIGITAL_IO_REGISTER	(0x7A000000 + 0xc0)
-
-#define MCU25_LED_REGISTER_ADDRESS	(0x7C000000 + 0x10)
-#define MCU25_VERSIONS_REGISTER	(0x7C000000 + 0x0C)
-#define MCU25_IO_CONFIGURATION		(0x7C000000 + 0x0e)
-#define MCU_SW_INSTALL_REQUESTED	0x08
-
-#define SDRAM_LEN	(32 << 20)	/* 32 MB - RAM */
-
-/*
- * This function is run very early, out of flash, and before devices are
- * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
- * of being in the init_sequence array.
- *
- * The SDRAM has been initialized already -- start.S:start called
- * init.S:init_sdram early on -- but it is not yet being used for
- * anything, not even stack. So be careful.
- */
-
-/* Attention: If you want 1 microsecs times from the external oscillator
- * 0x00004051 is okay for u-boot/linux, but different from old vxworks values
- * 0x00804051 causes problems with u-boot and linux!
- */
-#define CPC0_CR0_VALUE	0x0007F03C
-#define CPC0_CR1_VALUE	0x00004051
-
-int board_early_init_f (void)
-{
-	/* Documented in A-1171
-	 *
-	 * Interrupt controller setup for the MCU25 board.
-	 * Note: IRQ 0-15  405GP internally generated; high; level sensitive
-	 *       IRQ 16    405GP internally generated; low; level sensitive
-	 *      IRQ 17-24 RESERVED/UNUSED
-	 *      IRQ 31 (EXT IRQ 6) (unused)
-	 */
-	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
-	mtdcr(UIC0ER, 0x00000000); /* disable all ints */
-	mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
-	mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
-	mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
-	mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
-
-	mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
-	mtdcr(CPC0_ECR, 0x60606000);
-	mtdcr(CPC0_EIRR, 0x7C000000);
-	out32(GPIO0_OR,		CONFIG_SYS_GPIO0_OR );
-	out32(GPIO0_TCR,	CONFIG_SYS_GPIO0_TCR);
-	out32(GPIO0_ODR,	CONFIG_SYS_GPIO0_ODR);
-	mtspr(SPRN_CCR0,      0x00700000);
-
-	return 0;
-}
-
-#ifdef CONFIG_BOARD_PRE_INIT
-int board_pre_init (void)
-{
-	return board_early_init_f ();
-}
-#endif
-
-int sys_install_requested(void)
-{
-	u16 ioValue = in_be16((u16 *)MCU25_DIGITAL_IO_REGISTER);
-	return (ioValue & MCU_SW_INSTALL_REQUESTED) != 0;
-}
-
-int checkboard (void)
-{
-	u16 boardVersReg = in_be16((u16 *)MCU25_VERSIONS_REGISTER);
-	u16 hwConfig   = in_be16((u16 *)MCU25_IO_CONFIGURATION);
-	u16 generation = boardVersReg & 0x0f;
-	u16 index      = boardVersReg & 0xf0;
-
-	/* Cannot be done in board_early_init */
-	mtdcr(CPC0_CR0,  CPC0_CR0_VALUE);
-
-	/* Force /RTS to active. The board it not wired quite
-	 * correctly to use cts/rtc flow control, so just force the
-	 * /RST active and forget about it.
-	 */
-	writeb (readb (0xef600404) | 0x03, 0xef600404);
-	nm_show_print(generation, index, hwConfig);
-	return 0;
-}
-
-u32 hcu_led_get(void)
-{
-	return in_be16((u16 *)MCU25_LED_REGISTER_ADDRESS) & 0x3ff;
-}
-
-/*
- * hcu_led_set  value to be placed into the LEDs (max 6 bit)
- */
-void hcu_led_set(u32 value)
-{
-   out_be16((u16 *)MCU25_LED_REGISTER_ADDRESS, value);
-}
-
-/*
- * hcu_get_slot
- */
-u32 hcu_get_slot(void)
-{
-	u16 slot = in_be16((u16 *)MCU25_SLOT_ADDRESS);
-	return slot & 0x7f;
-}
-
-/*
- * get_serial_number
- */
-u32 get_serial_number(void)
-{
-	u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
-
-	if (serial == 0xffffffff)
-		return 0;
-
-	return serial;
-}
-
-
-/*
- * misc_init_r.
- */
-
-int misc_init_r(void)
-{
-	common_misc_init_r();
-	set_params_for_sw_install( sys_install_requested(), "mcu25" );
-	return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
-	unsigned int dram_size = 64*1024*1024;
-	init_ppc405_sdram(dram_size);
-
-#ifdef DEBUG
-	show_sdram_registers();
-#endif
-
-	return dram_size;
-}
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
-
-/*
- * Hardcoded flash setup:
- * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
- */
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
-{
-	if (banknum == 0) {	/* non-CFI boot flash */
-		info->portwidth = 1;
-		info->chipwidth = 1;
-		info->interface = FLASH_CFI_X8;
-		return 1;
-	} else
-		return 0;
-}
diff --git a/boards.cfg b/boards.cfg
index 314fce6..3e79c82 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -838,9 +838,6 @@ icon                         powerpc     ppc4xx      -                   mosaixt
 MIP405                       powerpc     ppc4xx      mip405              mpl
 MIP405T                      powerpc     ppc4xx      mip405              mpl            -           MIP405:MIP405T
 PIP405                       powerpc     ppc4xx      pip405              mpl
-hcu4                         powerpc     ppc4xx      hcu4                netstal
-hcu5                         powerpc     ppc4xx      hcu5                netstal
-mcu25                        powerpc     ppc4xx      mcu25               netstal
 alpr                         powerpc     ppc4xx      -                   prodrive
 p3p440                       powerpc     ppc4xx      -                   prodrive
 KAREF                        powerpc     ppc4xx      karef               sandburst
diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h
deleted file mode 100644
index c56efde..0000000
--- a/include/configs/hcu4.h
+++ /dev/null
@@ -1,275 +0,0 @@
-/*
- *(C) Copyright 2005-2008 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************************************
- * hcu4.h - configuration for HCU4 board (similar to hcu5.h)
- ***********************************************************************/
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*-----------------------------------------------------------------------
- * High Level Configuration Options
- *----------------------------------------------------------------------*/
-#define CONFIG_HCU4		1		/* Board is HCU4	*/
-#define CONFIG_4xx		1		/* ... PPC4xx family	*/
-#define CONFIG_405GP 1
-#define CONFIG_4xx   1
-#define CONFIG_HOSTNAME		hcu4
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFFB0000
-
-/*
- * Include common defines/options for all boards produced by Netstal Maschinen
- */
-#include "netstal-common.h"
-
-#define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
-
-#define CONFIG_BOARD_EARLY_INIT_F 1		/* Call board_early_init_f */
-#define CONFIG_MISC_INIT_R	1		/* Call misc_init_r	*/
-
-/*-----------------------------------------------------------------------
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
-*----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN	(320 * 1024)	/* Reserve 320 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(256 * 1024) /* Reserve 256 kB for malloc() */
-
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
-#define CONFIG_SYS_FLASH_BASE		0xfff80000	/* start of FLASH	*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-
-/* ... with on-chip memory here (4KBytes) */
-#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
-#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000
-/* Do not set up locked dcache as init ram. */
-#undef CONFIG_SYS_INIT_DCACHE_CS
-
-/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
-#define CONFIG_SYS_TEMP_STACK_OCM 1
-
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR	/* OCM		*/
-#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_OCM_DATA_SIZE
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-
-/*-----------------------------------------------------------------------
- * Serial Port
- *----------------------------------------------------------------------*/
-/*
- * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
- * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
- * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
- * The Linux BASE_BAUD define should match this configuration.
- *    baseBaud = cpuClock/(uartDivisor*16)
- * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
- * set Linux BASE_BAUD to 403200.
- */
-#undef	CONFIG_SYS_405_UART_ERRATA_59	       /* 405GP/CR Rev. D silicon */
-#define CONFIG_SYS_BASE_BAUD	    691200
-
-/* Set console baudrate to 9600 */
-#define CONFIG_BAUDRATE		9600
-
-/*-----------------------------------------------------------------------
- * Flash
- *----------------------------------------------------------------------*/
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* board provides its own flash_init code */
-#define CONFIG_FLASH_CFI_LEGACY		1
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_8BIT
-#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT	8	/* max number of sectors on one chip */
-
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-
-#undef	CONFIG_ENV_IS_IN_NVRAM
-#define CONFIG_ENV_IS_IN_FLASH
-#undef  CONFIG_ENV_IS_NOWHERE
-
-#ifdef  CONFIG_ENV_IS_IN_EEPROM
-/* Put the environment after the SDRAM configuration */
-#define PROM_SIZE	2048
-#define CONFIG_ENV_OFFSET	 512
-#define CONFIG_ENV_SIZE	(PROM_SIZE-CONFIG_ENV_OFFSET)
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-/* Put the environment in Flash */
-#define CONFIG_ENV_SECT_SIZE	0x10000	/* size of one complete sector	*/
-#define CONFIG_ENV_ADDR		((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
-#define	CONFIG_ENV_SIZE		8*1024	/* 8 KB Environment Sector	*/
-
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-#endif
-
-/*-----------------------------------------------------------------------
- * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
- * the first internal I2C controller of the PPC440EPx
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_SPD_BUS_NUM		0
-
-#define CONFIG_IPADDR		172.25.1.14
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_NETSTAL_DEF_ENV						\
-	CONFIG_NETSTAL_DEF_ENV_POWERPC					\
-	""
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SDRAM
-
-/* SPD EEPROM (sdram speed config) disabled */
-#define CONFIG_SPD_EEPROM          1
-#define SPD_EEPROM_ADDRESS      0x50
-
-/* POST support */
-#define CONFIG_POST		(CONFIG_SYS_POST_MEMORY   | \
-				 CONFIG_SYS_POST_CPU	   | \
-				 CONFIG_SYS_POST_UART	   | \
-				 CONFIG_SYS_POST_I2C	   | \
-				 CONFIG_SYS_POST_CACHE	   | \
-				 CONFIG_SYS_POST_ETHER	   | \
-				 CONFIG_SYS_POST_SPR)
-
-#define CONFIG_SYS_POST_UART_TABLE	{ CONFIG_SYS_NS16550_COM1 }
-#undef  CONFIG_LOGBUFFER
-#define CONFIG_SYS_POST_CACHE_ADDR	0x00800000 /* free virtual address	*/
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
-
-/*-----------------------------------------------------------------------
- * Miscellaneous configurable options
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-	#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size */
-#else
-	#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
-
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-/*-----------------------------------------------------------------------
- * External Bus Controller (EBC) Setup
- */
-
-#define CONFIG_SYS_EBC_CFG	0x98400000
-
-/* Memory Bank 0 (Flash Bank 0) initialization	*/
-#define CONFIG_SYS_EBC_PB0AP	0x02005400
-#define CONFIG_SYS_EBC_PB0CR	0xFFF18000  /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
-
-#define CONFIG_SYS_EBC_PB1AP	0x03041200
-#define CONFIG_SYS_EBC_PB1CR	0x7009A000  /* BAS=,BS=MB,BU=R/W,BW=bit	*/
-
-#define CONFIG_SYS_EBC_PB2AP	0x02054500
-#define CONFIG_SYS_EBC_PB2CR	0x78018000  /* BAS=,BS=MB,BU=R/W,BW=bit	*/
-
-#define CONFIG_SYS_EBC_PB3AP	0x01840300
-#define CONFIG_SYS_EBC_PB3CR	0x7c0ba000  /* BAS=,BS=MB,BU=R/W,BW=bit	*/
-
-#define CONFIG_SYS_EBC_PB4AP	0x01800300
-#define CONFIG_SYS_EBC_PB4CR	0x7e0ba000  /* BAS=,BS=MB,BU=R/W,BW=bit	*/
-
-#define CONFIG_SYS_GPIO0_OR	0xF27FFFFF  /* GPIO value */
-#define CONFIG_SYS_GPIO0_TCR	0x7FFE0000  /* GPIO value */
-#define CONFIG_SYS_GPIO0_ODR	0x00E897FC  /* GPIO value */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)/* Initial Memory map for Linux */
-
-/* Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM	CONFIG_SYS_FLASH_BASE	/* FLASH bank #0	*/
-#define FLASH_BASE1_PRELIM	0		/* FLASH bank #1	*/
-
-
-/* Configuration Port location */
-#define CONFIG_PORT_ADDR	0xF0000500
-
-#define CONFIG_SYS_HUSH_PARSER                 /* use "hush" command parser    */
-#ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#endif
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX	2	    /* which serial port to use */
-#endif
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
deleted file mode 100644
index 0c8fdf5..0000000
--- a/include/configs/hcu5.h
+++ /dev/null
@@ -1,325 +0,0 @@
-/*
- * (C) Copyright 2007-2008 Netstal Maschinen AG
- * Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- * (C) Copyright 2006-2007
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2006
- * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
- * Alain Saurel,            AMCC/IBM, alain.saurel@fr.ibm.com
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************************************
- * hcu5.h - configuration for HCU5 board (derived from sequoia.h)
- ***********************************************************************/
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*-----------------------------------------------------------------------
- * High Level Configuration Options
- *----------------------------------------------------------------------*/
-#define CONFIG_HCU5		1		/* Board is HCU5	*/
-#define CONFIG_440EPX		1		/* Specific PPC440EPx	*/
-#define CONFIG_440		1		/* ... PPC440 family	*/
-#define CONFIG_4xx		1		/* ... PPC4xx family	*/
-#define CONFIG_HOSTNAME		hcu5
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFFB0000
-
-/*
- * Include common defines/options for all boards produced by Netstal Maschinen
- */
-#include "netstal-common.h"
-
-#define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
-#define CONFIG_BOARD_EARLY_INIT_F 1		/* Call board_early_init_f */
-#define CONFIG_MISC_INIT_R	1		/* Call misc_init_r	*/
-
-/*-----------------------------------------------------------------------
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN	(320 * 1024)	/* Reserve 320 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(256 * 1024) /* Reserve 256 kB for malloc() */
-
-#define CONFIG_SYS_TLB_FOR_BOOT_FLASH  3
-#define CONFIG_SYS_BOOT_BASE_ADDR	0xfff00000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
-#define CONFIG_SYS_FLASH_BASE		0xfff80000	/* start of FLASH	*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_OCM_BASE		0xe0010000      /* ocm			*/
-#define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_OCM_BASE
-#define CONFIG_SYS_PCI_BASE		0xe0000000      /* Internal PCI regs	*/
-#define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory	*/
-#define CONFIG_SYS_PCI_MEMBASE1	CONFIG_SYS_PCI_MEMBASE  + 0x10000000
-#define CONFIG_SYS_PCI_MEMBASE2	CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
-#define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
-
-#define CONFIG_SYS_USB2D0_BASE		0xe0000100
-#define CONFIG_SYS_USB_DEVICE		0xe0000000
-#define CONFIG_SYS_USB_HOST		0xe0000400
-
-/*-----------------------------------------------------------------------
- * Initial RAM & stack pointer
- *----------------------------------------------------------------------*/
-/* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache	*/
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_BASE	/* OCM			*/
-
-#define CONFIG_SYS_INIT_RAM_SIZE	(4 << 10)
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-
-/*-----------------------------------------------------------------------
- * Serial Port
- *----------------------------------------------------------------------*/
-#undef CONFIG_SYS_EXT_SERIAL_CLOCK	       /* external serial clock */
-#define CONFIG_BAUDRATE		115200
-
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-
-#undef	CONFIG_ENV_IS_IN_NVRAM
-#define  CONFIG_ENV_IS_IN_FLASH
-#undef	CONFIG_ENV_IS_IN_EEPROM
-#undef  CONFIG_ENV_IS_NOWHERE
-
-#ifdef  CONFIG_ENV_IS_IN_EEPROM
-/* Put the environment after the SDRAM and bootstrap configuration */
-#define PROM_SIZE	2048
-#define CONFIG_SYS_BOOSTRAP_OPTION_OFFSET	 512
-#define CONFIG_ENV_OFFSET	 (CONFIG_SYS_BOOSTRAP_OPTION_OFFSET + 0x10)
-#define CONFIG_ENV_SIZE	(PROM_SIZE-CONFIG_ENV_OFFSET)
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-/* Put the environment in Flash */
-#define CONFIG_ENV_SECT_SIZE	0x10000 /* size of one complete sector	*/
-#define CONFIG_ENV_ADDR		((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE		8*1024	/* 8 KB Environment Sector	*/
-
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-
-#endif
-
-/*-----------------------------------------------------------------------
- * DDR SDRAM
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MBYTES_SDRAM        (128)		/* 128 MB or 256 MB	*/
-#define CONFIG_SYS_DDR_CACHED_ADDR	0x50000000	/* setup 2nd TLB cached here */
-#undef  CONFIG_DDR_DATA_EYE		/* Do not use DDR2 optimization	*/
-#define CONFIG_DDR_ECC		1	/* enable ECC			*/
-
-/* Following two definitions must be kept in sync with config.h of vxWorks */
-#define USER_RESERVED_MEM     (   0)  /* in kB */
-#define PM_RESERVED_MEM       (  64)  /* in kB: pmLib reserved area size */
-#define CONFIG_PRAM           ( USER_RESERVED_MEM + PM_RESERVED_MEM )
-
-#define CONFIG_SYS_MEM_TOP_HIDE	(4 << 10) /* don't use last 4kbytes	*/
-					/* 440EPx errata CHIP 11	*/
-
-/*-----------------------------------------------------------------------
- * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
- * the second internal I2C controller of the PPC440EPx
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_SPD_BUS_NUM	1
-
-/* Setup some board specific values for the default environment variables */
-#define CONFIG_IPADDR		172.25.1.15
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_NETSTAL_DEF_ENV						\
-	CONFIG_NETSTAL_DEF_ENV_POWERPC					\
-	""
-
-#define CONFIG_M88E1111_PHY	1
-#define	CONFIG_IBM_EMAC4_V4	1
-
-#define CONFIG_HAS_ETH1	1	/* add support for "eth1addr" */
-#define CONFIG_PHY1_ADDR	2
-
-/* USB */
-#define CONFIG_USB_OHCI
-#define CONFIG_USB_STORAGE
-
-/* Comment this out to enable USB 1.1 device */
-#define USB_2_0_DEVICE
-
-/* Partitions */
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-#define CONFIG_ISO_PARTITION
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_USB
-
-/* POST support */
-#define CONFIG_POST		(CONFIG_SYS_POST_MEMORY   | \
-				 CONFIG_SYS_POST_UART	   | \
-				 CONFIG_SYS_POST_I2C	   | \
-				 CONFIG_SYS_POST_CACHE	   | \
-				 CONFIG_SYS_POST_FPU	   | \
-				 CONFIG_SYS_POST_ETHER	   | \
-				 CONFIG_SYS_POST_SPR)
-
-#define CONFIG_SYS_POST_UART_TABLE	{ CONFIG_SYS_NS16550_COM1 }
-#define CONFIG_SYS_POST_CACHE_ADDR	0x7fff0000 /* free virtual address	*/
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
-
-#define CONFIG_SUPPORT_VFAT
-
-/*-----------------------------------------------------------------------
- * Miscellaneous configurable options
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	        "=> "	/* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE	        1024	/* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE	        256	/* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS	        16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	        CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on		*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000  /* default load address	*/
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *----------------------------------------------------------------------*/
-/* General PCI */
-#define CONFIG_PCI		1	/* include pci support	        */
-#undef CONFIG_PCI_PNP			/* do (not) pci plug-and-play   */
-#undef CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup  */
-#define CONFIG_SYS_PCI_TARGBASE        0x80000000 /* PCIaddr map to CONFIG_SYS_PCI_MEMBASE*/
-
-/* Board-specific PCI */
-#define CONFIG_SYS_PCI_TARGET_INIT
-#define CONFIG_SYS_PCI_MASTER_INIT
-
-#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8	/* AMCC				*/
-#define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe	/* Whatever			*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * Flash
- *----------------------------------------------------------------------*/
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* board provides its own flash_init code */
-#define CONFIG_FLASH_CFI_LEGACY		1
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_8BIT
-#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT	8	/* max number of sectors on one chip */
-
-/*-----------------------------------------------------------------------
- * External Bus Controller (EBC) Setup
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_FLASH		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS_1		0xC8000000 /* CAN */
-#define CONFIG_SYS_CS_2		0xCC000000 /* CPLD and IMC-Bus Standard */
-#define CONFIG_SYS_CPLD		CONFIG_SYS_CS_2
-#define CONFIG_SYS_CS_3		0xCE000000 /* CPLD and IMC-Bus Fast  */
-
-#define CONFIG_SYS_BOOTFLASH_CS	0	/* Boot Flash chip connected to CSx */
-#define CONFIG_SYS_EBC_PB0AP		0x02005400
-#define CONFIG_SYS_EBC_PB0CR		0xFFF18000 /* (CONFIG_SYS_FLASH | 0xda000)  */
-#define FLASH_BASE0_PRELIM	CONFIG_SYS_FLASH_BASE	/* FLASH bank #0	*/
-
-/* Memory Bank 1 CAN-Chips initialization				*/
-#define CONFIG_SYS_EBC_PB1AP		0x02054500
-#define CONFIG_SYS_EBC_PB1CR		0xC8018000
-
-/* Memory Bank 2 CPLD/IMC-Bus standard initialization			*/
-#define CONFIG_SYS_EBC_PB2AP		0x01840300
-#define CONFIG_SYS_EBC_PB2CR		0xCC0BA000
-
-/* Memory Bank 3 IMC-Bus fast mode initialization			*/
-#define CONFIG_SYS_EBC_PB3AP		0x01800300
-#define CONFIG_SYS_EBC_PB3CR		0xCE0BA000
-
-/* Memory Bank 4 (not used) initialization				*/
-#undef CONFIG_SYS_EBC_PB4AP
-#undef CONFIG_SYS_EBC_PB4CR
-
-/* Memory Bank 5 (not used) initialization				*/
-#undef CONFIG_SYS_EBC_PB5AP
-#undef CONFIG_SYS_EBC_PB5CR
-
-#define HCU_CPLD_VERSION_REGISTER ( CONFIG_SYS_CPLD + 0x0F00000 )
-#define HCU_HW_VERSION_REGISTER   ( CONFIG_SYS_CPLD + 0x1400000 )
-
-#define CONFIG_SYS_HUSH_PARSER                 /* use "hush" command parser    */
-#ifdef  CONFIG_SYS_HUSH_PARSER
-	#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
-#endif
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX	2	    /* which serial port to use */
-#endif
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h
deleted file mode 100644
index a162291..0000000
--- a/include/configs/mcu25.h
+++ /dev/null
@@ -1,281 +0,0 @@
-/*
- *(C) Copyright 2005-2007 Netstal Maschinen AG
- *    Niklaus Giger (Niklaus.Giger@netstal.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************************************
- * mcu25.h - configuration for MCU25 board (similar to hcu4.h)
- ***********************************************************************/
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*-----------------------------------------------------------------------
- * High Level Configuration Options
- *----------------------------------------------------------------------*/
-#define CONFIG_MCU25		1		/* Board is MCU25	*/
-#define CONFIG_4xx		1		/* ... PPC4xx family	*/
-#define CONFIG_405GP 1
-#define CONFIG_4xx   1
-#define CONFIG_HOSTNAME		mcu25
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFFB0000
-
-/*
- * Include common defines/options for all boards produced by Netstal Maschinen
- */
-#include "netstal-common.h"
-
-#define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
-
-#define CONFIG_BOARD_EARLY_INIT_F 1		/* Call board_early_init_f */
-#define CONFIG_MISC_INIT_R	1		/* Call misc_init_r	*/
-
-/*-----------------------------------------------------------------------
- * Base addresses -- Note these are effective addresses where the
- * actual resources get mapped (not physical addresses)
-*----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN		(320 * 1024) /* Reserve 320 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN		(256 * 1024) /* Reserve 256 kB for malloc() */
-
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
-#define CONFIG_SYS_FLASH_BASE		0xfff80000	/* start of FLASH	*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-
-/* ... with on-chip memory here (4KBytes) */
-#define CONFIG_SYS_OCM_DATA_ADDR	0xF4000000
-#define CONFIG_SYS_OCM_DATA_SIZE	0x00001000
-/* Do not set up locked dcache as init ram. */
-#undef CONFIG_SYS_INIT_DCACHE_CS
-
-/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
-#define CONFIG_SYS_TEMP_STACK_OCM	1
-
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR	/* OCM		*/
-#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_OCM_DATA_SIZE
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-
-/*-----------------------------------------------------------------------
- * Serial Port
- *----------------------------------------------------------------------*/
-/*
- * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
- * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
- * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
- * The Linux BASE_BAUD define should match this configuration.
- *    baseBaud = cpuClock/(uartDivisor*16)
- * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
- * set Linux BASE_BAUD to 403200.
- */
-#undef	CONFIG_SYS_405_UART_ERRATA_59	       /* 405GP/CR Rev. D silicon */
-#define CONFIG_SYS_BASE_BAUD	    691200
-
-/* Set console baudrate to 9600 */
-#define CONFIG_BAUDRATE		9600
-
-/*-----------------------------------------------------------------------
- * Flash
- *----------------------------------------------------------------------*/
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* board provides its own flash_init code */
-#define CONFIG_FLASH_CFI_LEGACY		1
-#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_8BIT
-#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT	8	/* max number of sectors on one chip */
-
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-
-#undef	CONFIG_ENV_IS_IN_NVRAM
-#define CONFIG_ENV_IS_IN_FLASH
-#undef  CONFIG_ENV_IS_NOWHERE
-
-#ifdef  CONFIG_ENV_IS_IN_EEPROM
-/* Put the environment after the SDRAM configuration */
-#define PROM_SIZE	2048
-#define CONFIG_ENV_OFFSET	 512
-#define CONFIG_ENV_SIZE	(PROM_SIZE-CONFIG_ENV_OFFSET)
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-/* Put the environment in Flash */
-#define CONFIG_ENV_SECT_SIZE	0x10000 /* size of one complete sector */
-#define CONFIG_ENV_ADDR		((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
-#define	CONFIG_ENV_SIZE		8*1024	/* 8 KB Environment Sector */
-
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-#endif
-
-/*-----------------------------------------------------------------------
- * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
- * the first internal I2C controller of the PPC440EPx
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_SPD_BUS_NUM		0
-
-/* Setup some board specific values for the default environment variables */
-#define CONFIG_IPADDR		172.25.1.25
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_NETSTAL_DEF_ENV						\
-	CONFIG_NETSTAL_DEF_ENV_POWERPC					\
-	""
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SDRAM
-
-/* SPD EEPROM (sdram speed config) disabled */
-#define CONFIG_SPD_EEPROM          1
-#define SPD_EEPROM_ADDRESS      0x50
-
-/* POST support */
-#define CONFIG_POST		(CONFIG_SYS_POST_MEMORY   | \
-				 CONFIG_SYS_POST_CPU	   | \
-				 CONFIG_SYS_POST_UART	   | \
-				 CONFIG_SYS_POST_I2C	   | \
-				 CONFIG_SYS_POST_CACHE	   | \
-				 CONFIG_SYS_POST_ETHER	   | \
-				 CONFIG_SYS_POST_SPR)
-
-#define CONFIG_SYS_POST_UART_TABLE	{ CONFIG_SYS_NS16550_COM1 }
-#undef  CONFIG_LOGBUFFER
-#define CONFIG_SYS_POST_CACHE_ADDR	0x00800000 /* free virtual address	*/
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
-
-/*-----------------------------------------------------------------------
- * Miscellaneous configurable options
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-	#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size */
-#else
-	#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
-
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-/*-----------------------------------------------------------------------
- * External Bus Controller (EBC) Setup
- */
-
-#define CONFIG_SYS_EBC_CFG            0x98400000
-
-/* Memory Bank 0 (Flash Bank 0) initialization	*/
-#define CONFIG_SYS_EBC_PB0AP		0x02005400
-#define CONFIG_SYS_EBC_PB0CR		0xFFF18000  /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit*/
-
-#define CONFIG_SYS_EBC_PB1AP		0x03041200
-#define CONFIG_SYS_EBC_PB1CR		0x7009A000  /* BAS=,BS=MB,BU=R/W,BW=bit	*/
-
-#define CONFIG_SYS_EBC_PB2AP		0x01845200u  /* BAS=,BS=MB,BU=R/W,BW=bit */
-#define CONFIG_SYS_EBC_PB2CR		0x7A09A000u
-
-#define CONFIG_SYS_EBC_PB3AP		0x01845200u  /* BAS=,BS=MB,BU=R/W,BW=bit */
-#define CONFIG_SYS_EBC_PB3CR		0x7B09A000u
-
-#define CONFIG_SYS_EBC_PB4AP		0x01845200u  /* BAS=,BS=MB,BU=R/W,BW=bit */
-#define CONFIG_SYS_EBC_PB4CR		0x7C09A000u
-
-#define CONFIG_SYS_EBC_PB5AP		0x00800200u
-#define CONFIG_SYS_EBC_PB5CR		0x7D81A000u
-
-#define CONFIG_SYS_EBC_PB6AP		0x01040200u
-#define CONFIG_SYS_EBC_PB6CR		0x7D91A000u
-
-#define CONFIG_SYS_GPIO0_OR		0x087FFFFF  /* GPIO value */
-#define CONFIG_SYS_GPIO0_TCR		0x7FFF8000  /* GPIO value */
-#define CONFIG_SYS_GPIO0_ODR		0xFFFF0000  /* GPIO value */
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
-
-/* Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM	CONFIG_SYS_FLASH_BASE	/* FLASH bank #0	*/
-#define FLASH_BASE1_PRELIM	0		/* FLASH bank #1	*/
-
-
-/* Configuration Port location */
-#define CONFIG_PORT_ADDR	0xF0000500
-
-#define CONFIG_SYS_HUSH_PARSER                 /* use "hush" command parser    */
-#ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#endif
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX	2	    /* which serial port to use */
-#endif
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h
deleted file mode 100644
index 122f139..0000000
--- a/include/configs/netstal-common.h
+++ /dev/null
@@ -1,261 +0,0 @@
-/*
- * (C) Copyright 2008
- * Niklaus Giger, Netstal Maschinen AG, niklaus.giger@netstal.com
- * adapted from amcc-common.h by
- * (C) Copyright 2008
- *  * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * Common configuration options for all Netstal boards
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __NETSTAL_COMMON_H
-#define __NETSTAL_COMMON_H
-
-#define CONFIG_SYS_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* Start of U-Boot	*/
-#define CONFIG_SYS_MONITOR_LEN		(320 * 1024)	/* Reserve 320 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(256 * 1024)	/* Reserve 256 kB for malloc() */
-
-/*
- * UART
- */
-#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
-#define CONFIG_SERIAL_MULTI
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	1
-#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
-#define CONFIG_SYS_BAUDRATE_TABLE  \
-    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-
-/*
- * I2C
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
-#define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/* This is the 7bit address of the device, not including P. */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-
-/* The EEPROM can do 16byte ( 1 << 4 ) page writes. */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-
-/*
- * Ethernet/EMAC/PHY
- */
-#define CONFIG_PPC4xx_EMAC
-#define CONFIG_MII			/* MII PHY management		*/
-#define CONFIG_PHY_ADDR		1	/* PHY address			*/
-#define CONFIG_NET_MULTI	1
-#if defined(CONFIG_440)
-#define CONFIG_NETCONSOLE		/* include NetConsole support	*/
-#define CONFIG_SYS_RX_ETH_BUFFER	32	/* number of eth rx buffers	*/
-#else
-#define CONFIG_SYS_RX_ETH_BUFFER	16	/* number of eth rx buffers	*/
-#endif
-#define CONFIG_HAS_ETH0
-
-/*
- * Commands
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#if defined(CONFIG_440)
-#define CONFIG_CMD_CACHE
-#endif
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_BOOT_RETRY_TIME 30
-#define CONFIG_RESET_TO_RETRY
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second	*/
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on		*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000  /* default load address	*/
-#define CONFIG_SYS_EXTBDINFO			/* To use extended board_into (bd_t) */
-
-#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks	*/
-
-#define CONFIG_CMDLINE_EDITING		/* add command line history	*/
-#define CONFIG_AUTO_COMPLETE		/* add autocompletion support	*/
-#define CONFIG_LOOPW			/* enable loopw command         */
-#define CONFIG_MX_CYCLIC		/* enable mdc/mwc commands      */
-#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
-#define CONFIG_VERSION_VARIABLE 	/* include version env variable */
-#define CONFIG_SYS_CONSOLE_INFO_QUIET		/* don't print console @ startup*/
-
-#define CONFIG_SYS_HUSH_PARSER			/* Use the HUSH parser		*/
-#ifdef	CONFIG_SYS_HUSH_PARSER
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#endif
-
-#define CONFIG_LOADS_ECHO		/* echo on for serial download	*/
-#define CONFIG_SYS_LOADS_BAUD_CHANGE		/* allow baudrate change	*/
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_SUBNETMASK
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
-
-/*
- * Internal Definitions
- */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port*/
-#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use	*/
-#endif
-
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-
-/*
- * Booting and default environment
- */
-#define CONFIG_PREBOOT	"echo;"	\
-	"echo Type \"run net_nfs\" to mount root filesystem over NFS;" \
-	"echo"
-#define CONFIG_BOOTCOMMAND	"run vx"
-
-/*
- * Only very few boards have default console not on ttyS0 (like Taishan)
- */
-#if !defined(CONFIG_USE_TTY)
-#define CONFIG_USE_TTY	ttyS0
-#endif
-
-/*
- * Only some 4xx PPC's are equipped with an FPU
- */
-#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
-    defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define CONFIG_NETSTAL_DEF_ENV_ROOTPATH	"rootpath=/opt/eldk/ppc_4xxFP\0"
-#else
-#define CONFIG_NETSTAL_DEF_ENV_ROOTPATH	"rootpath=/opt/eldk/ppc_4xx\0"
-#endif
-
-/*
- * Only some boards need to extend the bootargs by some additional
- * parameters (like Makalu)
- */
-#if !defined(CONFIG_ADDMISC)
-#define CONFIG_ADDMISC	"addmisc=setenv bootargs ${bootargs}\0"
-#endif
-
-#define xstr(s)	str(s)
-#define str(s)	#s
-
-/* Setup some values for the default environment variables */
-#define CONFIG_SERVERIP		172.25.1.1
-#define CONFIG_ETHADDR      00:60:13:00:00:00   /* Netstal Machines AG MAC */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE
-
-#define CONFIG_SYS_TFTP_LOADADDR	0x01000000
-#define CONFIG_SYS_VXWORKS_ADD_PARAMS	"u=dpu pw=netstal8752"
-#define CONFIG_SYS_VXWORKS_SERVERNAME	"c"
-/*
- * General common environment variables shared by all boards produced by Netstal Maschinen
- */
-#define CONFIG_NETSTAL_DEF_ENV						\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"addtty=setenv bootargs ${bootargs}"				\
-		" console=" xstr(CONFIG_USE_TTY) ",${baudrate}\0"	\
-	CONFIG_ADDMISC							\
-	"initrd_high=30000000\0"					\
-	"kernel_addr_r=400000\0"					\
-	"fdt_addr_r=800000\0"						\
-	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
-	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
-	"uload=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " "		\
-		xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"			\
-	"vx_rom=" xstr(CONFIG_HOSTNAME) "/"				\
-		xstr(CONFIG_HOSTNAME) "_vx_rom\0"			\
-	"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"\
-		"era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"	\
-		"cp.b ${fileaddr} "xstr(CONFIG_SYS_MONITOR_BASE) 	\
-		" ${filesize}; setenv filesize\0"			\
-	"upd=run uload update\0"					\
-	"vx=setenv bootfile ${vx_rom}; tftp " 				\
-		xstr(CONFIG_SYS_TFTP_LOADADDR) "; bootvx\0"		\
-	CONFIG_NETSTAL_DEF_ENV_ROOTPATH
-
-/*
- * Default environment for arch/powerpc booting
- * for boards that are ported to arch/powerpc
- */
-#define CONFIG_NETSTAL_DEF_ENV_POWERPC					\
-	"flash_self=run ramargs addip addtty addmisc;"			\
-		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"	\
-	"flash_nfs=run nfsargs addip addtty addmisc;"			\
-		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
-	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
-		"tftp ${fdt_addr_r} ${fdt_file}; "			\
-		"run nfsargs addip addtty addmisc;"			\
-		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
-	"fdt_file=" xstr(CONFIG_HOSTNAME) "/" xstr(CONFIG_HOSTNAME) ".dtb\0"
-
-#endif /* __NETSTAL_COMMON_H */