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author | Sandeep Paulraj <s-paulraj@ti.com> | 2009-09-29 10:02:38 -0400 |
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committer | Tom Rix <Tom.Rix@windriver.com> | 2009-10-13 06:17:37 -0500 |
commit | 00e1665a3cf956e09ac2ce86ef6ec459f6bfb33c (patch) | |
tree | 704804bca316b802cd661ef2b73cc2f878232cf3 | |
parent | 95ae803afbdd9f673c94b992ea624a10d252afc2 (diff) | |
download | u-boot-imx-00e1665a3cf956e09ac2ce86ef6ec459f6bfb33c.zip u-boot-imx-00e1665a3cf956e09ac2ce86ef6ec459f6bfb33c.tar.gz u-boot-imx-00e1665a3cf956e09ac2ce86ef6ec459f6bfb33c.tar.bz2 |
TI: DaVinci: GPIO header file and definitions
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
-rw-r--r-- | include/asm-arm/arch-davinci/gpio_defs.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/include/asm-arm/arch-davinci/gpio_defs.h b/include/asm-arm/arch-davinci/gpio_defs.h new file mode 100644 index 0000000..ec43969 --- /dev/null +++ b/include/asm-arm/arch-davinci/gpio_defs.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2009 Texas Instruments Incorporated + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _GPIO_DEFS_H_ +#define _GPIO_DEFS_H_ + +#define DAVINCI_GPIO_BINTEN 0x01C67008 +#define DAVINCI_GPIO_BANK01 0x01C67010 +#define DAVINCI_GPIO_BANK23 0x01C67038 +#define DAVINCI_GPIO_BANK45 0x01C67060 +#define DAVINCI_GPIO_BANK67 0x01C67088 + +struct davinci_gpio { + unsigned int dir; + unsigned int out_data; + unsigned int set_data; + unsigned int clr_data; + unsigned int in_data; + unsigned int set_rising; + unsigned int clr_rising; + unsigned int set_falling; + unsigned int clr_falling; + unsigned int intstat; +}; + +struct davinci_gpio_bank { + int num_gpio; + unsigned int irq_num; + unsigned int irq_mask; + unsigned long *in_use; + unsigned long base; +}; + +#endif + |