Initial revision

5 files changed, 1292 insertions, 0 deletions

diff --git a/cpu/mpc8260/bedbug_603e.c b/cpu/mpc8260/bedbug_603e.c
new file mode 100644
index 0000000..1ca057f
--- /dev/null
+++ b/cpu/mpc8260/bedbug_603e.c
@@ -0,0 +1,239 @@
+/*
+ * Bedbug Functions specific to the MPC603e core
+ */
+
+#include <common.h>
+#include <command.h>
+#include <linux/ctype.h>
+
+#include <cmd_bedbug.h>
+#include <bedbug/bedbug.h>
+#include <bedbug/regs.h>
+#include <bedbug/ppc.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && (defined(CONFIG_MPC824X) || defined(CONFIG_MPC8260))
+
+#define MAX_BREAK_POINTS 1
+
+extern CPU_DEBUG_CTX bug_ctx;
+
+void bedbug603e_init __P((void));
+void bedbug603e_do_break __P((cmd_tbl_t*,int,int,char*[]));
+void bedbug603e_break_isr __P((struct pt_regs*));
+int  bedbug603e_find_empty __P((void));
+int  bedbug603e_set __P((int,unsigned long));
+int  bedbug603e_clear __P((int));
+
+
+/* ======================================================================
+ * Initialize the global bug_ctx structure for the processor.  Clear all
+ * of the breakpoints.
+ * ====================================================================== */
+
+void bedbug603e_init( void )
+{
+  int	i;
+  /* -------------------------------------------------- */
+
+  bug_ctx.hw_debug_enabled = 0;
+  bug_ctx.stopped = 0;
+  bug_ctx.current_bp = 0;
+  bug_ctx.regs = NULL;
+
+  bug_ctx.do_break   = bedbug603e_do_break;
+  bug_ctx.break_isr  = bedbug603e_break_isr;
+  bug_ctx.find_empty = bedbug603e_find_empty;
+  bug_ctx.set        = bedbug603e_set;
+  bug_ctx.clear      = bedbug603e_clear;
+
+  for( i = 1; i <= MAX_BREAK_POINTS; ++i )
+    (*bug_ctx.clear)( i );
+
+  puts ("BEDBUG:ready\n");
+  return;
+} /* bedbug_init_breakpoints */
+
+
+
+/* ======================================================================
+ * Set/clear/show the hardware breakpoint for the 603e.  The "off"
+ * string will disable a specific breakpoint.  The "show" string will
+ * display the current breakpoints.  Otherwise an address will set a
+ * breakpoint at that address.  Setting a breakpoint uses the CPU-specific
+ * set routine which will assign a breakpoint number.
+ * ====================================================================== */
+
+void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
+                         char *argv[])
+{
+  long		addr;           /* Address to break at  */
+  int		which_bp;       /* Breakpoint number    */
+  /* -------------------------------------------------- */
+
+  if (argc < 2)
+  {
+    printf ("Usage:\n%s\n", cmdtp->usage);
+    return;
+  }
+
+  /* Turn off a breakpoint */
+
+  if( strcmp( argv[ 1 ], "off" ) == 0 )
+  {
+    if( bug_ctx.hw_debug_enabled == 0 )
+    {
+      printf( "No breakpoints enabled\n" );
+      return;
+    }
+
+    which_bp = simple_strtoul( argv[ 2 ], NULL, 10 );
+
+    if( bug_ctx.clear )
+      (*bug_ctx.clear)( which_bp );
+
+    printf( "Breakpoint %d removed\n", which_bp );
+    return;
+  }
+
+  /* Show a list of breakpoints */
+
+  if( strcmp( argv[ 1 ], "show" ) == 0 )
+  {
+    for( which_bp = 1; which_bp <= MAX_BREAK_POINTS; ++which_bp )
+    {
+
+      addr = GET_IABR();
+
+      printf( "Breakpoint [%d]: ", which_bp );
+      if( (addr & 0x00000002) == 0 )
+	printf( "NOT SET\n" );
+      else
+	disppc( (unsigned char *)(addr & 0xFFFFFFFC), 0, 1, bedbug_puts, F_RADHEX );
+    }
+    return;
+  }
+
+  /* Set a breakpoint at the address */
+
+  if(!(( isdigit( argv[ 1 ][ 0 ] )) ||
+        (( argv[ 1 ][ 0 ] >= 'a' ) && ( argv[ 1 ][ 0 ] <= 'f' )) ||
+        (( argv[ 1 ][ 0 ] >= 'A' ) && ( argv[ 1 ][ 0 ] <= 'F' ))))
+  {
+    printf ("Usage:\n%s\n", cmdtp->usage);
+    return;
+  }
+
+  addr = simple_strtoul( argv[ 1 ], NULL, 16 );
+
+  if(( bug_ctx.set ) && ( which_bp = (*bug_ctx.set)( 0, addr )) > 0 )
+  {
+    printf( "Breakpoint [%d]: ", which_bp );
+    disppc( (unsigned char *)addr, 0, 1, bedbug_puts, F_RADHEX );
+  }
+
+  return;
+} /* bedbug603e_do_break */
+
+
+
+/* ======================================================================
+ * Handle a breakpoint.  Enter a mini main loop.  Stay in the loop until
+ * the stopped flag in the debug context is cleared.
+ * ====================================================================== */
+
+void bedbug603e_break_isr( struct pt_regs *regs )
+{
+  unsigned long	addr;           /* Address stopped at   */
+  /* -------------------------------------------------- */
+
+  bug_ctx.current_bp = 1;
+  addr = GET_IABR() & 0xFFFFFFFC;
+
+  bedbug_main_loop( addr, regs );
+  return;
+} /* bedbug603e_break_isr */
+
+
+
+/* ======================================================================
+ * See if the hardware breakpoint is available.
+ * ====================================================================== */
+
+int bedbug603e_find_empty( void )
+{
+  /* -------------------------------------------------- */
+
+  if( (GET_IABR() && 0x00000002) == 0 )
+    return 1;
+
+  return 0;
+} /* bedbug603e_find_empty */
+
+
+
+/* ======================================================================
+ * Set a breakpoint.  If 'which_bp' is zero then find an unused breakpoint
+ * number, otherwise reassign the given breakpoint.  If hardware debugging
+ * is not enabled, then turn it on via the MSR and DBCR0.  Set the break
+ * address in the IABR register.
+ * ====================================================================== */
+
+int bedbug603e_set( int which_bp, unsigned long addr )
+{
+  /* -------------------------------------------------- */
+
+  if(( addr & 0x00000003 ) != 0 )
+  {
+    printf( "Breakpoints must be on a 32 bit boundary\n" );
+    return 0;
+  }
+
+  /* Only look if which_bp == 0, else use which_bp */
+  if(( bug_ctx.find_empty ) && ( !which_bp ) &&
+     ( which_bp = (*bug_ctx.find_empty)()) == 0 )
+  {
+    printf( "All breakpoints in use\n" );
+    return 0;
+  }
+
+  if( which_bp < 1 || which_bp > MAX_BREAK_POINTS )
+  {
+    printf( "Invalid break point # %d\n", which_bp );
+    return 0;
+  }
+
+  if( ! bug_ctx.hw_debug_enabled )
+  {
+    bug_ctx.hw_debug_enabled = 1;
+  }
+
+  SET_IABR( addr | 0x00000002 );
+
+  return which_bp;
+} /* bedbug603e_set */
+
+
+
+/* ======================================================================
+ * Disable a specific breakoint by setting the IABR register to zero.
+ * ====================================================================== */
+
+int bedbug603e_clear( int which_bp )
+{
+  /* -------------------------------------------------- */
+
+  if( which_bp < 1 || which_bp > MAX_BREAK_POINTS )
+  {
+    printf( "Invalid break point # (%d)\n", which_bp );
+    return -1;
+  }
+
+  SET_IABR( 0 );
+
+  return 0;
+} /* bedbug603e_clear */
+
+
+/* ====================================================================== */
+#endif
+
diff --git a/cpu/mpc8xx/bedbug_860.c b/cpu/mpc8xx/bedbug_860.c
new file mode 100644
index 0000000..05590df
--- /dev/null
+++ b/cpu/mpc8xx/bedbug_860.c
@@ -0,0 +1,318 @@
+/*
+ * Bedbug Functions specific to the MPC860 chip
+ */
+
+#include <common.h>
+#include <command.h>
+#include <linux/ctype.h>
+
+#include <cmd_bedbug.h>
+#include <bedbug/bedbug.h>
+#include <bedbug/regs.h>
+#include <bedbug/ppc.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_MPC860)
+
+#define MAX_BREAK_POINTS 2
+
+extern CPU_DEBUG_CTX bug_ctx;
+
+void bedbug860_init __P((void));
+void bedbug860_do_break __P((cmd_tbl_t*,int,int,char*[]));
+void bedbug860_break_isr __P((struct pt_regs*));
+int  bedbug860_find_empty __P((void));
+int  bedbug860_set __P((int,unsigned long));
+int  bedbug860_clear __P((int));
+
+
+/* ======================================================================
+ * Initialize the global bug_ctx structure for the MPC860.  Clear all
+ * of the breakpoints.
+ * ====================================================================== */
+
+void bedbug860_init( void )
+{
+  int	i;
+  /* -------------------------------------------------- */
+
+  bug_ctx.hw_debug_enabled = 0;
+  bug_ctx.stopped = 0;
+  bug_ctx.current_bp = 0;
+  bug_ctx.regs = NULL;
+
+  bug_ctx.do_break   = bedbug860_do_break;
+  bug_ctx.break_isr  = bedbug860_break_isr;
+  bug_ctx.find_empty = bedbug860_find_empty;
+  bug_ctx.set        = bedbug860_set;
+  bug_ctx.clear      = bedbug860_clear;
+
+  for( i = 1; i <= MAX_BREAK_POINTS; ++i )
+    (*bug_ctx.clear)( i );
+
+  puts ("BEDBUG:ready\n");
+  return;
+} /* bedbug_init_breakpoints */
+
+
+
+/* ======================================================================
+ * Set/clear/show one of the hardware breakpoints for the 860.  The "off"
+ * string will disable a specific breakpoint.  The "show" string will
+ * display the current breakpoints.  Otherwise an address will set a
+ * breakpoint at that address.  Setting a breakpoint uses the CPU-specific
+ * set routine which will assign a breakpoint number.
+ * ====================================================================== */
+
+void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
+                         char *argv[])
+{
+  long		addr = 0;       /* Address to break at  */
+  int		which_bp;       /* Breakpoint number    */
+  /* -------------------------------------------------- */
+
+  if (argc < 2)
+  {
+    printf ("Usage:\n%s\n", cmdtp->usage);
+    return;
+  }
+
+  /* Turn off a breakpoint */
+
+  if( strcmp( argv[ 1 ], "off" ) == 0 )
+  {
+    if( bug_ctx.hw_debug_enabled == 0 )
+    {
+      printf( "No breakpoints enabled\n" );
+      return;
+    }
+
+    which_bp = simple_strtoul( argv[ 2 ], NULL, 10 );
+
+    if( bug_ctx.clear )
+      (*bug_ctx.clear)( which_bp );
+
+    printf( "Breakpoint %d removed\n", which_bp );
+    return;
+  }
+
+  /* Show a list of breakpoints */
+
+  if( strcmp( argv[ 1 ], "show" ) == 0 )
+  {
+    for( which_bp = 1; which_bp <= MAX_BREAK_POINTS; ++which_bp )
+    {
+
+      switch( which_bp )
+      {
+      case 1: addr = GET_CMPA(); break;
+      case 2: addr = GET_CMPB(); break;
+      case 3: addr = GET_CMPC(); break;
+      case 4: addr = GET_CMPD(); break;
+      }
+
+      printf( "Breakpoint [%d]: ", which_bp );
+      if( addr == 0 )
+	printf( "NOT SET\n" );
+      else
+	disppc( (unsigned char *)addr, 0, 1, bedbug_puts, F_RADHEX );
+    }
+    return;
+  }
+
+  /* Set a breakpoint at the address */
+
+  if( !isdigit( argv[ 1 ][ 0 ]))
+  {
+    printf ("Usage:\n%s\n", cmdtp->usage);
+    return;
+  }
+
+  addr = simple_strtoul( argv[ 1 ], NULL, 16 ) & 0xfffffffc;
+
+  if(( bug_ctx.set ) && ( which_bp = (*bug_ctx.set)( 0, addr )) > 0 )
+  {
+    printf( "Breakpoint [%d]: ", which_bp );
+    disppc( (unsigned char *)addr, 0, 1, bedbug_puts, F_RADHEX );
+  }
+
+  return;
+} /* bedbug860_do_break */
+
+
+
+/* ======================================================================
+ * Handle a breakpoint.  First determine which breakpoint was hit by
+ * looking at the DeBug Status Register (DBSR), clear the breakpoint
+ * and enter a mini main loop.  Stay in the loop until the stopped flag
+ * in the debug context is cleared.
+ * ====================================================================== */
+
+void bedbug860_break_isr( struct pt_regs *regs )
+{
+  unsigned long	addr;     /* Address stopped at   */
+  unsigned long	cause;     /* Address stopped at   */
+  /* -------------------------------------------------- */
+
+  cause = GET_ICR();
+
+  if( !(cause & 0x00000004)) {
+    printf( "Not an instruction breakpoint (ICR 0x%08lx)\n", cause );
+    return;
+  }
+
+  addr = regs->nip;
+
+  if( addr == GET_CMPA() )
+  {
+    bug_ctx.current_bp = 1;
+  }
+  else if( addr == GET_CMPB() )
+  {
+    bug_ctx.current_bp = 2;
+  }
+  else if( addr == GET_CMPC() )
+  {
+    bug_ctx.current_bp = 3;
+  }
+  else if( addr == GET_CMPD() )
+  {
+    bug_ctx.current_bp = 4;
+  }
+
+  bedbug_main_loop( addr, regs );
+  return;
+} /* bedbug860_break_isr */
+
+
+
+/* ======================================================================
+ * Look through all of the hardware breakpoints available to see if one
+ * is unused.
+ * ====================================================================== */
+
+int bedbug860_find_empty( void )
+{
+  /* -------------------------------------------------- */
+
+  if( GET_CMPA() == 0 )
+    return 1;
+
+  if( GET_CMPB() == 0 )
+    return 2;
+
+  if( GET_CMPC() == 0 )
+    return 3;
+
+  if( GET_CMPD() == 0 )
+    return 4;
+
+  return 0;
+} /* bedbug860_find_empty */
+
+
+
+/* ======================================================================
+ * Set a breakpoint.  If 'which_bp' is zero then find an unused breakpoint
+ * number, otherwise reassign the given breakpoint.  If hardware debugging
+ * is not enabled, then turn it on via the MSR and DBCR0.  Set the break
+ * address in the appropriate IACx register and enable proper address
+ * beakpoint in DBCR0.
+ * ====================================================================== */
+
+int bedbug860_set( int which_bp, unsigned long addr )
+{
+  /* -------------------------------------------------- */
+
+  /* Only look if which_bp == 0, else use which_bp */
+  if(( bug_ctx.find_empty ) && ( !which_bp ) &&
+     ( which_bp = (*bug_ctx.find_empty)()) == 0 )
+  {
+    printf( "All breakpoints in use\n" );
+    return 0;
+  }
+
+  if( which_bp < 1 || which_bp > MAX_BREAK_POINTS )
+  {
+    printf( "Invalid break point # %d\n", which_bp );
+    return 0;
+  }
+
+  if( ! bug_ctx.hw_debug_enabled )
+  {
+    bug_ctx.hw_debug_enabled = 1;
+    SET_DER( GET_DER() | 0x00000004 );
+  }
+
+  switch( which_bp )
+  {
+  case 1:
+    SET_CMPA( addr );
+    SET_ICTRL( GET_ICTRL() | 0x80080800 ); /* CTA=Equal,IW0=Match A,SIW0EN */
+    break;
+
+  case 2:
+    SET_CMPB( addr );
+    SET_ICTRL( GET_ICTRL() | 0x10020400 ); /* CTB=Equal,IW1=Match B,SIW1EN */
+    break;
+
+  case 3:
+    SET_CMPC( addr );
+    SET_ICTRL( GET_ICTRL() | 0x02008200 ); /* CTC=Equal,IW2=Match C,SIW2EN */
+    break;
+
+  case 4:
+    SET_CMPD( addr );
+    SET_ICTRL( GET_ICTRL() | 0x00404100 ); /* CTD=Equal,IW3=Match D,SIW3EN */
+    break;
+  }
+
+  return which_bp;
+} /* bedbug860_set */
+
+
+
+/* ======================================================================
+ * Disable a specific breakoint by setting the appropriate IACx register
+ * to zero and claring the instruction address breakpoint in DBCR0.
+ * ====================================================================== */
+
+int bedbug860_clear( int which_bp )
+{
+  /* -------------------------------------------------- */
+
+  if( which_bp < 1 || which_bp > MAX_BREAK_POINTS )
+  {
+    printf( "Invalid break point # (%d)\n", which_bp );
+    return -1;
+  }
+
+  switch( which_bp )
+  {
+  case 1:
+    SET_CMPA( 0 );
+    SET_ICTRL( GET_ICTRL() & ~0x80080800 ); /* CTA=Equal,IW0=Match A,SIW0EN */
+    break;
+
+  case 2:
+    SET_CMPB( 0 );
+    SET_ICTRL( GET_ICTRL() & ~0x10020400 ); /* CTB=Equal,IW1=Match B,SIW1EN */
+    break;
+
+  case 3:
+    SET_CMPC( 0 );
+    SET_ICTRL( GET_ICTRL() & ~0x02008200 ); /* CTC=Equal,IW2=Match C,SIW2EN */
+    break;
+
+  case 4:
+    SET_CMPD( 0 );
+    SET_ICTRL( GET_ICTRL() & ~0x00404100 ); /* CTD=Equal,IW3=Match D,SIW3EN */
+    break;
+  }
+
+  return 0;
+} /* bedbug860_clear */
+
+
+/* ====================================================================== */
+#endif
+
diff --git a/cpu/ppc4xx/bedbug_405.c b/cpu/ppc4xx/bedbug_405.c
new file mode 100644
index 0000000..eabc583
--- /dev/null
+++ b/cpu/ppc4xx/bedbug_405.c
@@ -0,0 +1,309 @@
+/*
+ * Bedbug Functions specific to the PPC405 chip
+ */
+
+#include <common.h>
+#include <command.h>
+#include <linux/ctype.h>
+
+#include <cmd_bedbug.h>
+#include <bedbug/bedbug.h>
+#include <bedbug/regs.h>
+#include <bedbug/ppc.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_4xx)
+
+#define MAX_BREAK_POINTS 4
+
+extern CPU_DEBUG_CTX bug_ctx;
+
+void bedbug405_init __P ((void));
+void bedbug405_do_break __P ((cmd_tbl_t *, int, int, char *[]));
+void bedbug405_break_isr __P ((struct pt_regs *));
+int bedbug405_find_empty __P ((void));
+int bedbug405_set __P ((int, unsigned long));
+int bedbug405_clear __P ((int));
+
+
+/* ======================================================================
+ * Initialize the global bug_ctx structure for the IBM PPC405.	Clear all
+ * of the breakpoints.
+ * ====================================================================== */
+
+void bedbug405_init (void)
+{
+	int i;
+
+	/* -------------------------------------------------- */
+
+	bug_ctx.hw_debug_enabled = 0;
+	bug_ctx.stopped = 0;
+	bug_ctx.current_bp = 0;
+	bug_ctx.regs = NULL;
+
+	bug_ctx.do_break = bedbug405_do_break;
+	bug_ctx.break_isr = bedbug405_break_isr;
+	bug_ctx.find_empty = bedbug405_find_empty;
+	bug_ctx.set = bedbug405_set;
+	bug_ctx.clear = bedbug405_clear;
+
+	for (i = 1; i <= MAX_BREAK_POINTS; ++i)
+		(*bug_ctx.clear) (i);
+
+	puts ("BEDBUG:ready\n");
+	return;
+}	/* bedbug_init_breakpoints */
+
+
+
+/* ======================================================================
+ * Set/clear/show one of the hardware breakpoints for the 405.	The "off"
+ * string will disable a specific breakpoint.  The "show" string will
+ * display the current breakpoints.  Otherwise an address will set a
+ * breakpoint at that address.	Setting a breakpoint uses the CPU-specific
+ * set routine which will assign a breakpoint number.
+ * ====================================================================== */
+
+void bedbug405_do_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	long addr = 0;		/* Address to break at  */
+	int which_bp;		/* Breakpoint number    */
+
+	/* -------------------------------------------------- */
+
+	if (argc < 2) {
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return;
+	}
+
+	/* Turn off a breakpoint */
+
+	if (strcmp (argv[1], "off") == 0) {
+		if (bug_ctx.hw_debug_enabled == 0) {
+			printf ("No breakpoints enabled\n");
+			return;
+		}
+
+		which_bp = simple_strtoul (argv[2], NULL, 10);
+
+		if (bug_ctx.clear)
+			(*bug_ctx.clear) (which_bp);
+
+		printf ("Breakpoint %d removed\n", which_bp);
+		return;
+	}
+
+	/* Show a list of breakpoints */
+
+	if (strcmp (argv[1], "show") == 0) {
+		for (which_bp = 1; which_bp <= MAX_BREAK_POINTS; ++which_bp) {
+
+			switch (which_bp) {
+			case 1:
+				addr = GET_IAC1 ();
+				break;
+			case 2:
+				addr = GET_IAC2 ();
+				break;
+			case 3:
+				addr = GET_IAC3 ();
+				break;
+			case 4:
+				addr = GET_IAC4 ();
+				break;
+			}
+
+			printf ("Breakpoint [%d]: ", which_bp);
+			if (addr == 0)
+				printf ("NOT SET\n");
+			else
+				disppc ((unsigned char *) addr, 0, 1, bedbug_puts,
+						F_RADHEX);
+		}
+		return;
+	}
+
+	/* Set a breakpoint at the address */
+
+	if (!isdigit (argv[1][0])) {
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return;
+	}
+
+	addr = simple_strtoul (argv[1], NULL, 16) & 0xfffffffc;
+
+	if ((bug_ctx.set) && (which_bp = (*bug_ctx.set) (0, addr)) > 0) {
+		printf ("Breakpoint [%d]: ", which_bp);
+		disppc ((unsigned char *) addr, 0, 1, bedbug_puts, F_RADHEX);
+	}
+
+	return;
+}	/* bedbug405_do_break */
+
+
+
+/* ======================================================================
+ * Handle a breakpoint.	 First determine which breakpoint was hit by
+ * looking at the DeBug Status Register (DBSR), clear the breakpoint
+ * and enter a mini main loop.	Stay in the loop until the stopped flag
+ * in the debug context is cleared.
+ * ====================================================================== */
+
+void bedbug405_break_isr (struct pt_regs *regs)
+{
+	unsigned long dbsr_val;		/* Value of the DBSR    */
+	unsigned long addr = 0;		/* Address stopped at   */
+
+	/* -------------------------------------------------- */
+
+	dbsr_val = GET_DBSR ();
+
+	if (dbsr_val & DBSR_IA1) {
+		bug_ctx.current_bp = 1;
+		addr = GET_IAC1 ();
+		SET_DBSR (DBSR_IA1);	/* Write a 1 to clear */
+	} else if (dbsr_val & DBSR_IA2) {
+		bug_ctx.current_bp = 2;
+		addr = GET_IAC2 ();
+		SET_DBSR (DBSR_IA2);	/* Write a 1 to clear */
+	} else if (dbsr_val & DBSR_IA3) {
+		bug_ctx.current_bp = 3;
+		addr = GET_IAC3 ();
+		SET_DBSR (DBSR_IA3);	/* Write a 1 to clear */
+	} else if (dbsr_val & DBSR_IA4) {
+		bug_ctx.current_bp = 4;
+		addr = GET_IAC4 ();
+		SET_DBSR (DBSR_IA4);	/* Write a 1 to clear */
+	}
+
+	bedbug_main_loop (addr, regs);
+	return;
+}	/* bedbug405_break_isr */
+
+
+
+/* ======================================================================
+ * Look through all of the hardware breakpoints available to see if one
+ * is unused.
+ * ====================================================================== */
+
+int bedbug405_find_empty (void)
+{
+	/* -------------------------------------------------- */
+
+	if (GET_IAC1 () == 0)
+		return 1;
+
+	if (GET_IAC2 () == 0)
+		return 2;
+
+	if (GET_IAC3 () == 0)
+		return 3;
+
+	if (GET_IAC4 () == 0)
+		return 4;
+
+	return 0;
+}	/* bedbug405_find_empty */
+
+
+
+/* ======================================================================
+ * Set a breakpoint.  If 'which_bp' is zero then find an unused breakpoint
+ * number, otherwise reassign the given breakpoint.  If hardware debugging
+ * is not enabled, then turn it on via the MSR and DBCR0.  Set the break
+ * address in the appropriate IACx register and enable proper address
+ * beakpoint in DBCR0.
+ * ====================================================================== */
+
+int bedbug405_set (int which_bp, unsigned long addr)
+{
+	/* -------------------------------------------------- */
+
+	/* Only look if which_bp == 0, else use which_bp */
+	if ((bug_ctx.find_empty) && (!which_bp) &&
+		(which_bp = (*bug_ctx.find_empty) ()) == 0) {
+		printf ("All breakpoints in use\n");
+		return 0;
+	}
+
+	if (which_bp < 1 || which_bp > MAX_BREAK_POINTS) {
+		printf ("Invalid break point # %d\n", which_bp);
+		return 0;
+	}
+
+	if (!bug_ctx.hw_debug_enabled) {
+		SET_MSR (GET_MSR () | 0x200);	/* set MSR[ DE ] */
+		SET_DBCR0 (GET_DBCR0 () | DBCR0_IDM);
+		bug_ctx.hw_debug_enabled = 1;
+	}
+
+	switch (which_bp) {
+	case 1:
+		SET_IAC1 (addr);
+		SET_DBCR0 (GET_DBCR0 () | DBCR0_IA1);
+		break;
+
+	case 2:
+		SET_IAC2 (addr);
+		SET_DBCR0 (GET_DBCR0 () | DBCR0_IA2);
+		break;
+
+	case 3:
+		SET_IAC3 (addr);
+		SET_DBCR0 (GET_DBCR0 () | DBCR0_IA3);
+		break;
+
+	case 4:
+		SET_IAC4 (addr);
+		SET_DBCR0 (GET_DBCR0 () | DBCR0_IA4);
+		break;
+	}
+
+	return which_bp;
+}	/* bedbug405_set */
+
+
+
+/* ======================================================================
+ * Disable a specific breakoint by setting the appropriate IACx register
+ * to zero and claring the instruction address breakpoint in DBCR0.
+ * ====================================================================== */
+
+int bedbug405_clear (int which_bp)
+{
+	/* -------------------------------------------------- */
+
+	if (which_bp < 1 || which_bp > MAX_BREAK_POINTS) {
+		printf ("Invalid break point # (%d)\n", which_bp);
+		return -1;
+	}
+
+	switch (which_bp) {
+	case 1:
+		SET_IAC1 (0);
+		SET_DBCR0 (GET_DBCR0 () & ~DBCR0_IA1);
+		break;
+
+	case 2:
+		SET_IAC2 (0);
+		SET_DBCR0 (GET_DBCR0 () & ~DBCR0_IA2);
+		break;
+
+	case 3:
+		SET_IAC3 (0);
+		SET_DBCR0 (GET_DBCR0 () & ~DBCR0_IA3);
+		break;
+
+	case 4:
+		SET_IAC4 (0);
+		SET_DBCR0 (GET_DBCR0 () & ~DBCR0_IA4);
+		break;
+	}
+
+	return 0;
+}	/* bedbug405_clear */
+
+
+/* ====================================================================== */
+#endif
diff --git a/lib_ppc/kgdb.c b/lib_ppc/kgdb.c
new file mode 100644
index 0000000..cef35d3
--- /dev/null
+++ b/lib_ppc/kgdb.c
@@ -0,0 +1,326 @@
+#include <common.h>
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+
+#include <kgdb.h>
+#include <asm/signal.h>
+#include <asm/processor.h>
+
+#define PC_REGNUM 64
+#define SP_REGNUM 1
+
+void breakinst(void);
+
+int
+kgdb_setjmp(long *buf)
+{
+	asm ("mflr 0; stw 0,0(%0);"
+	     "stw 1,4(%0); stw 2,8(%0);"
+	     "mfcr 0; stw 0,12(%0);"
+	     "stmw 13,16(%0)"
+	     : : "r" (buf));
+	/* XXX should save fp regs as well */
+	return 0;
+}
+
+void
+kgdb_longjmp(long *buf, int val)
+{
+	if (val == 0)
+		val = 1;
+	asm ("lmw 13,16(%0);"
+	     "lwz 0,12(%0); mtcrf 0x38,0;"
+	     "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);"
+	     "mtlr 0; mr 3,%1"
+	     : : "r" (buf), "r" (val));
+}
+
+static inline unsigned long
+get_msr(void)
+{
+	unsigned long msr;
+	asm volatile("mfmsr %0" : "=r" (msr):);
+	return msr;
+}
+
+static inline void
+set_msr(unsigned long msr)
+{
+	asm volatile("mtmsr %0" : : "r" (msr));
+}
+
+/* Convert the SPARC hardware trap type code to a unix signal number. */
+/*
+ * This table contains the mapping between PowerPC hardware trap types, and
+ * signals, which are primarily what GDB understands.
+ */
+static struct hard_trap_info
+{
+	unsigned int tt;		/* Trap type code for powerpc */
+	unsigned char signo;		/* Signal that we map this trap into */
+} hard_trap_info[] = {
+	{ 0x200, SIGSEGV },			/* machine check */
+	{ 0x300, SIGSEGV },			/* address error (store) */
+	{ 0x400, SIGBUS },			/* instruction bus error */
+	{ 0x500, SIGINT },			/* interrupt */
+	{ 0x600, SIGBUS },			/* alingment */
+	{ 0x700, SIGTRAP },			/* breakpoint trap */
+	{ 0x800, SIGFPE },			/* fpu unavail */
+	{ 0x900, SIGALRM },			/* decrementer */
+	{ 0xa00, SIGILL },			/* reserved */
+	{ 0xb00, SIGILL },			/* reserved */
+	{ 0xc00, SIGCHLD },			/* syscall */
+	{ 0xd00, SIGTRAP },			/* single-step/watch */
+	{ 0xe00, SIGFPE },			/* fp assist */
+	{ 0, 0}				/* Must be last */
+};
+
+static int
+computeSignal(unsigned int tt)
+{
+	struct hard_trap_info *ht;
+
+	for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
+		if (ht->tt == tt)
+			return ht->signo;
+
+	return SIGHUP;         /* default for things we don't know about */
+}
+
+void
+kgdb_enter(struct pt_regs *regs, kgdb_data *kdp)
+{
+	unsigned long msr;
+
+	kdp->private[0] = msr = get_msr();
+	set_msr(msr & ~MSR_EE);	/* disable interrupts */
+
+	if (regs->nip == (unsigned long)breakinst) {
+		/* Skip over breakpoint trap insn */
+		regs->nip += 4;
+	}
+	regs->msr &= ~MSR_SE;
+
+	/* reply to host that an exception has occurred */
+	kdp->sigval = computeSignal(regs->trap);
+
+	kdp->nregs = 2;
+
+	kdp->regs[0].num = PC_REGNUM;
+	kdp->regs[0].val = regs->nip;
+
+	kdp->regs[1].num = SP_REGNUM;
+	kdp->regs[1].val = regs->gpr[SP_REGNUM];
+}
+
+void
+kgdb_exit(struct pt_regs *regs, kgdb_data *kdp)
+{
+	unsigned long msr = kdp->private[0];
+
+	if (kdp->extype & KGDBEXIT_WITHADDR)
+		regs->nip = kdp->exaddr;
+
+	switch (kdp->extype & KGDBEXIT_TYPEMASK) {
+
+	case KGDBEXIT_KILL:
+	case KGDBEXIT_CONTINUE:
+		set_msr(msr);
+		break;
+
+	case KGDBEXIT_SINGLE:
+		regs->msr |= MSR_SE;
+#if 0
+		set_msr(msr | MSR_SE);
+#endif
+		break;
+	}
+}
+
+int
+kgdb_trap(struct pt_regs *regs)
+{
+	return (regs->trap);
+}
+
+/* return the value of the CPU registers.
+ * some of them are non-PowerPC names :(
+ * they are stored in gdb like:
+ * struct {
+ *     u32 gpr[32];
+ *     f64 fpr[32];
+ *     u32 pc, ps, cnd, lr; (ps=msr)
+ *     u32 cnt, xer, mq;
+ * }
+ */
+
+#define SPACE_REQUIRED	((32*4)+(32*8)+(6*4))
+
+#ifdef CONFIG_8260
+/* store floating double indexed */
+#define STFDI(n,p)	__asm__ __volatile__ ("stfd " #n ",%0" : "=o"(p[2*n]))
+/* store floating double multiple */
+#define STFDM(p)	{ STFDI( 0,p); STFDI( 1,p); STFDI( 2,p); STFDI( 3,p); \
+			  STFDI( 4,p); STFDI( 5,p); STFDI( 6,p); STFDI( 7,p); \
+			  STFDI( 8,p); STFDI( 9,p); STFDI(10,p); STFDI(11,p); \
+			  STFDI(12,p); STFDI(13,p); STFDI(14,p); STFDI(15,p); \
+			  STFDI(16,p); STFDI(17,p); STFDI(18,p); STFDI(19,p); \
+			  STFDI(20,p); STFDI(21,p); STFDI(22,p); STFDI(23,p); \
+			  STFDI(24,p); STFDI(25,p); STFDI(26,p); STFDI(27,p); \
+			  STFDI(28,p); STFDI(29,p); STFDI(30,p); STFDI(31,p); }
+#endif
+
+int
+kgdb_getregs(struct pt_regs *regs, char *buf, int max)
+{
+	int i;
+	unsigned long *ptr = (unsigned long *)buf;
+
+	if (max < SPACE_REQUIRED)
+		kgdb_error(KGDBERR_NOSPACE);
+
+	if ((unsigned long)ptr & 3)
+		kgdb_error(KGDBERR_ALIGNFAULT);
+
+	/* General Purpose Regs */
+	for (i = 0; i < 32; i++)
+		*ptr++ = regs->gpr[i];
+
+	/* Floating Point Regs */
+#ifdef CONFIG_8260
+	STFDM(ptr);
+	ptr += 32*2;
+#else
+	for (i = 0; i < 32; i++) {
+		*ptr++ = 0;
+		*ptr++ = 0;
+	}
+#endif
+
+	/* pc, msr, cr, lr, ctr, xer, (mq is unused) */
+	*ptr++ = regs->nip;
+	*ptr++ = regs->msr;
+	*ptr++ = regs->ccr;
+	*ptr++ = regs->link;
+	*ptr++ = regs->ctr;
+	*ptr++ = regs->xer;
+
+	return (SPACE_REQUIRED);
+}
+
+/* set the value of the CPU registers */
+
+#ifdef CONFIG_8260
+/* load floating double */
+#define LFD(n,v)	__asm__ __volatile__ ("lfd " #n ",%0" :: "o"(v))
+/* load floating double indexed */
+#define LFDI(n,p)	__asm__ __volatile__ ("lfd " #n ",%0" :: "o"((p)[2*n]))
+/* load floating double multiple */
+#define LFDM(p)		{ LFDI( 0,p); LFDI( 1,p); LFDI( 2,p); LFDI( 3,p); \
+			  LFDI( 4,p); LFDI( 5,p); LFDI( 6,p); LFDI( 7,p); \
+			  LFDI( 8,p); LFDI( 9,p); LFDI(10,p); LFDI(11,p); \
+			  LFDI(12,p); LFDI(13,p); LFDI(14,p); LFDI(15,p); \
+			  LFDI(16,p); LFDI(17,p); LFDI(18,p); LFDI(19,p); \
+			  LFDI(20,p); LFDI(21,p); LFDI(22,p); LFDI(23,p); \
+			  LFDI(24,p); LFDI(25,p); LFDI(26,p); LFDI(27,p); \
+			  LFDI(28,p); LFDI(29,p); LFDI(30,p); LFDI(31,p); }
+#endif
+
+void
+kgdb_putreg(struct pt_regs *regs, int regno, char *buf, int length)
+{
+	unsigned long *ptr = (unsigned long *)buf;
+
+	if (regno < 0 || regno >= 70)
+		kgdb_error(KGDBERR_BADPARAMS);
+	else if (regno >= 32 && regno < 64) {
+		if (length < 8)
+			kgdb_error(KGDBERR_NOSPACE);
+	}
+	else {
+		if (length < 4)
+			kgdb_error(KGDBERR_NOSPACE);
+	}
+
+	if ((unsigned long)ptr & 3)
+		kgdb_error(KGDBERR_ALIGNFAULT);
+
+	if (regno >= 0 && regno < 32)
+		regs->gpr[regno] = *ptr;
+	else switch (regno) {
+
+#ifdef CONFIG_8260
+#define caseF(n) \
+	case (n) + 32:	LFD(n, *ptr);		break;
+
+caseF( 0) caseF( 1) caseF( 2) caseF( 3) caseF( 4) caseF( 5) caseF( 6) caseF( 7)
+caseF( 8) caseF( 9) caseF(10) caseF(11) caseF(12) caseF(13) caseF(14) caseF(15)
+caseF(16) caseF(17) caseF(18) caseF(19) caseF(20) caseF(21) caseF(22) caseF(23)
+caseF(24) caseF(25) caseF(26) caseF(27) caseF(28) caseF(29) caseF(30) caseF(31)
+
+#undef caseF
+#endif
+
+	case 64:	regs->nip = *ptr;	break;
+	case 65:	regs->msr = *ptr;	break;
+	case 66:	regs->ccr = *ptr;	break;
+	case 67:	regs->link = *ptr;	break;
+	case 68:	regs->ctr = *ptr;	break;
+	case 69:	regs->ctr = *ptr;	break;
+
+	default:
+		kgdb_error(KGDBERR_BADPARAMS);
+	}
+}
+
+void
+kgdb_putregs(struct pt_regs *regs, char *buf, int length)
+{
+	int i;
+	unsigned long *ptr = (unsigned long *)buf;
+
+	if (length < SPACE_REQUIRED)
+		kgdb_error(KGDBERR_NOSPACE);
+
+	if ((unsigned long)ptr & 3)
+		kgdb_error(KGDBERR_ALIGNFAULT);
+
+	/*
+	 * If the stack pointer has moved, you should pray.
+	 * (cause only god can help you).
+	 */
+
+	/* General Purpose Regs */
+	for (i = 0; i < 32; i++)
+		regs->gpr[i] = *ptr++;
+
+	/* Floating Point Regs */
+#ifdef CONFIG_8260
+	LFDM(ptr);
+#endif
+	ptr += 32*2;
+
+	/* pc, msr, cr, lr, ctr, xer, (mq is unused) */
+	regs->nip = *ptr++;
+	regs->msr = *ptr++;
+	regs->ccr = *ptr++;
+	regs->link = *ptr++;
+	regs->ctr = *ptr++;
+	regs->xer = *ptr++;
+}
+
+/* This function will generate a breakpoint exception.  It is used at the
+   beginning of a program to sync up with a debugger and can be used
+   otherwise as a quick means to stop program execution and "break" into
+   the debugger. */
+
+void
+kgdb_breakpoint(int argc, char *argv[])
+{
+	asm("	.globl breakinst\n\
+	     breakinst: .long 0x7d821008\n\
+            ");
+}
+
+#endif /* CFG_CMD_KGDB */
diff --git a/lib_ppc/time.c b/lib_ppc/time.c
new file mode 100644
index 0000000..5165abb
--- /dev/null
+++ b/lib_ppc/time.c
@@ -0,0 +1,100 @@
+/*
+ * (C) Copyright 2000, 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * This function is intended for SHORT delays only.
+ * It will overflow at around 10 seconds @ 400MHz,
+ * or 20 seconds @ 200MHz.
+ */
+unsigned long usec2ticks(unsigned long usec)
+{
+	ulong ticks;
+
+	if (usec < 1000) {
+		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
+	} else {
+		ticks = ((usec / 10) * (get_tbclk() / 100000));
+	}
+
+	return (ticks);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * We implement the delay by converting the delay (the number of
+ * microseconds to wait) into a number of time base ticks; then we
+ * watch the time base until it has incremented by that amount.
+ */
+void udelay(unsigned long usec)
+{
+	ulong ticks = usec2ticks (usec);
+
+	wait_ticks (ticks);
+}
+
+/* ------------------------------------------------------------------------- */
+
+unsigned long ticks2usec(unsigned long ticks)
+{
+	ulong tbclk = get_tbclk();
+
+	/* usec = ticks * 1000000 / tbclk
+	 * Multiplication would overflow at ~4.2e3 ticks,
+	 * so we break it up into
+	 * usec = ( ( ticks * 1000) / tbclk ) * 1000;
+	 */
+	ticks *= 1000L;
+	ticks /= tbclk;
+	ticks *= 1000L;
+
+	return ((ulong)ticks);
+}
+
+/* ------------------------------------------------------------------------- */
+
+int init_timebase (void)
+{
+#ifdef	CONFIG_8xx
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+	/* unlock */
+	immap->im_sitk.sitk_tbk = KAPWR_KEY;
+#endif
+
+	/* reset */
+	asm ("li 3,0 ; mttbu 3 ; mttbl 3 ;");
+
+#ifdef	CONFIG_8xx
+	/* enable */
+	immap->im_sit.sit_tbscr |= TBSCR_TBE;
+#endif
+	return (0);
+}
+/* ------------------------------------------------------------------------- */
+