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authorEric Sun <jian.sun@freescale.com>2011-11-30 13:41:04 +0800
committerEric Sun <jian.sun@freescale.com>2011-11-30 13:54:57 +0800
commite696f7dac56591a5616b397bc32a1d9bb57147ee (patch)
treeb558bae2008bb2b48dea28624cc54927637772f8
parent127f1cf74be5bdb9eaf18b097aa8605d72ce71f7 (diff)
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ENGR00163513 MX6Q-UBOOT : Add download_mode cmd
Add "download_mode" command to U-Boot. It will force a system reset and let boot running in "boot from serial rom" mode, which can be used by manufacturing tool. The command will triggle a write to SRC_GPR9 and SRC_GPR10, then triggle a watchdog reset. GPR9 and GPR10 can maintain their value during the reset, the value in it make ROM to start in "boot from serial rom" mode. After that GPR9 and GPR10 are written by their original value for normal boot. Signed-off-by: Eric Sun <jian.sun@freescale.com>
-rw-r--r--cpu/arm_cortexa8/mx6/generic.c50
-rw-r--r--include/asm-arm/arch-mx6/mx6.h3
-rw-r--r--include/configs/mx6q_arm2.h2
-rw-r--r--include/configs/mx6q_sabreauto.h2
-rw-r--r--include/configs/mx6q_sabrelite.h2
5 files changed, 59 insertions, 0 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index 175cd03..8e5c9a6 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -889,4 +889,54 @@ int otp_clk_disable(void)
return 0;
}
+#ifdef CONFIG_CMD_IMX_DOWNLOAD_MODE
+#define PERSIST_WATCHDOG_RESET_BOOT (0x10000000)
+/*BOOT_CFG1[7..4] = 0x3 Boot from Serial ROM (I2C/SPI)*/
+#define BOOT_MODE_SERIAL_ROM (0x00000030)
+
+/* this function should call before enter linux, otherwise, you
+ * watchdog reset will enter mfg download mode again, clear this bit
+ * to prevent this behavior */
+void clear_mfgmode_mem(void)
+{
+ u32 reg;
+ reg = readl(SRC_BASE_ADDR + SRC_GPR9);
+
+ reg &= ~BOOT_MODE_SERIAL_ROM;
+ writel(reg, SRC_BASE_ADDR + SRC_GPR9);
+
+ reg = readl(SRC_BASE_ADDR + SRC_GPR10);
+ reg &= ~PERSIST_WATCHDOG_RESET_BOOT;
+ reg = writel(reg, SRC_BASE_ADDR + SRC_GPR10);
+}
+
+void do_switch_mfgmode(void)
+{
+ u32 reg;
+
+ /*
+ * During reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
+ * to SBMR1, which will determine what is the boot device.
+ * Here SERIAL_ROM mode is selected
+ */
+ reg = readl(SRC_BASE_ADDR + SRC_GPR9);
+ reg |= BOOT_MODE_SERIAL_ROM;
+ writel(reg, SRC_BASE_ADDR + SRC_GPR9);
+
+ reg = readl(SRC_BASE_ADDR + SRC_GPR10);
+ reg |= PERSIST_WATCHDOG_RESET_BOOT;
+ writel(reg, SRC_BASE_ADDR + SRC_GPR10);
+
+ /*
+ * this watchdog reset will let chip enter mfgtool download
+ * mode.
+ */
+ do_reset(NULL, 0, 0, NULL);
+}
+
+U_BOOT_CMD(
+ download_mode, 1, 1, do_switch_mfgmode,
+ "download_mode - enter i.MX serial/usb download mode",
+ "");
+#endif
diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h
index ae52fa2..e7f06fc 100644
--- a/include/asm-arm/arch-mx6/mx6.h
+++ b/include/asm-arm/arch-mx6/mx6.h
@@ -622,6 +622,9 @@
#define PLATFORM_ICGC 0x14
+#define SRC_GPR9 0x40
+#define SRC_GPR10 0x44
+
#ifndef __ASSEMBLER__
enum boot_device {
diff --git a/include/configs/mx6q_arm2.h b/include/configs/mx6q_arm2.h
index 0a9ff07..1d08bb0 100644
--- a/include/configs/mx6q_arm2.h
+++ b/include/configs/mx6q_arm2.h
@@ -103,6 +103,8 @@
#define CONFIG_CMD_SATA
#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_IMX_DOWNLOAD_MODE
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_PRIME "FEC0"
diff --git a/include/configs/mx6q_sabreauto.h b/include/configs/mx6q_sabreauto.h
index 4c51864..38744a6 100644
--- a/include/configs/mx6q_sabreauto.h
+++ b/include/configs/mx6q_sabreauto.h
@@ -103,6 +103,8 @@
#define CONFIG_CMD_SATA
#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_IMX_DOWNLOAD_MODE
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_PRIME "FEC0"
diff --git a/include/configs/mx6q_sabrelite.h b/include/configs/mx6q_sabrelite.h
index b346d3c..c94cd6a 100644
--- a/include/configs/mx6q_sabrelite.h
+++ b/include/configs/mx6q_sabrelite.h
@@ -104,6 +104,8 @@
#define CONFIG_CMD_SATA
#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_IMX_DOWNLOAD_MODE
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_PRIME "FEC0"