86xx: Remove old-style law setup code

This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>

11 files changed, 0 insertions, 558 deletions

diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile
index feecf4c..489689e 100644
--- a/board/freescale/mpc8610hpcd/Makefile
+++ b/board/freescale/mpc8610hpcd/Makefile
@@ -27,8 +27,6 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-SOBJS	:= init.o
-
 COBJS	:= $(BOARD).o law.o
 
 COBJS-${CONFIG_FSL_DIU_FB}	+= mpc8610hpcd_diu.o
diff --git a/board/freescale/mpc8610hpcd/init.S b/board/freescale/mpc8610hpcd/init.S
deleted file mode 100644
index 4d811e1..0000000
--- a/board/freescale/mpc8610hpcd/init.S
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * Copyright 2007 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- */
-
-#include <config.h>
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <mpc86xx.h>
-
-#define LAWAR_TRGT_PCI1		0x00000000
-#define LAWAR_TRGT_PCIE1	0x00200000
-#define LAWAR_TRGT_PCIE2	0x00100000
-#define LAWAR_TRGT_LBC		0x00400000
-#define LAWAR_TRGT_DDR		0x00f00000
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
-#define LAWAR1	(LAWAR_EN | LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M))
-#else
-#define LAWBAR1 0
-#define LAWAR1	((LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR2 ((CFG_PCIE1_MEM_BASE>>12) & 0xffffff)
-#define LAWAR2	(LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCIE2_MEM_BASE>>12) & 0xffffff)
-#define LAWAR3	(LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR4 ((PIXIS_BASE>>12) & 0xffffff)
-#define LAWAR4	(LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M))
-
-#define LAWBAR5 ((CFG_PCIE1_IO_PHYS>>12) & 0xffffff)
-#define LAWAR5	(LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_1M))
-
-#define LAWBAR6 ((CFG_PCIE2_IO_PHYS>>12) & 0xffffff)
-#define LAWAR6	(LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_1M))
-
-#define LAWBAR7 ((CFG_FLASH_BASE >>12) & 0xffffff)
-#define LAWAR7	(LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR8 ((CFG_PCI1_MEM_PHYS>>12) & 0xffffff)
-#define LAWAR8	(LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR9 ((CFG_PCI1_IO_PHYS>>12) & 0xffffff)
-#define LAWAR9	(LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M))
-
-
-	.section .bootpg, "ax"
-	.globl	law_entry
-law_entry:
-	lis	r7,CFG_CCSRBAR@h
-	ori	r7,r7,CFG_CCSRBAR@l
-
-	addi	r4,r7,0
-	addi	r5,r7,0
-
-	/* Skip LAWAR0, start at LAWAR1 */
-	lis	r6,LAWBAR1@h
-	ori	r6,r6,LAWBAR1@l
-	stwu	r6, 0xc28(r4)
-
-	lis	r6,LAWAR1@h
-	ori	r6,r6,LAWAR1@l
-	stwu	r6, 0xc30(r5)
-
-	/* LAWBAR2, LAWAR2 */
-	lis	r6,LAWBAR2@h
-	ori	r6,r6,LAWBAR2@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR2@h
-	ori	r6,r6,LAWAR2@l
-	stwu	r6, 0x20(r5)
-
-	/* LAWBAR3, LAWAR3 */
-	lis	r6,LAWBAR3@h
-	ori	r6,r6,LAWBAR3@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR3@h
-	ori	r6,r6,LAWAR3@l
-	stwu	r6, 0x20(r5)
-
-	/* LAWBAR4, LAWAR4 */
-	lis	r6,LAWBAR4@h
-	ori	r6,r6,LAWBAR4@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR4@h
-	ori	r6,r6,LAWAR4@l
-	stwu	r6, 0x20(r5)
-	/* LAWBAR5, LAWAR5 */
-	lis	r6,LAWBAR5@h
-	ori	r6,r6,LAWBAR5@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR5@h
-	ori	r6,r6,LAWAR5@l
-	stwu	r6, 0x20(r5)
-
-	/* LAWBAR6, LAWAR6 */
-	lis	r6,LAWBAR6@h
-	ori	r6,r6,LAWBAR6@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR6@h
-	ori	r6,r6,LAWAR6@l
-	stwu	r6, 0x20(r5)
-
-	/* LAWBAR7, LAWAR7 */
-	lis	r6,LAWBAR7@h
-	ori	r6,r6,LAWBAR7@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR7@h
-	ori	r6,r6,LAWAR7@l
-	stwu	r6, 0x20(r5)
-
-	/* LAWBAR8, LAWAR8 */
-	lis	r6,LAWBAR8@h
-	ori	r6,r6,LAWBAR8@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR8@h
-	ori	r6,r6,LAWAR8@l
-	stwu	r6, 0x20(r5)
-
-	/* LAWBAR9, LAWAR9 */
-	lis	r6,LAWBAR9@h
-	ori	r6,r6,LAWBAR9@l
-	stwu	r6, 0x20(r4)
-
-	lis	r6,LAWAR9@h
-	ori	r6,r6,LAWAR9@l
-	stwu	r6, 0x20(r5)
-
-	blr
diff --git a/board/freescale/mpc8610hpcd/u-boot.lds b/board/freescale/mpc8610hpcd/u-boot.lds
index 37838ec..b88138e 100644
--- a/board/freescale/mpc8610hpcd/u-boot.lds
+++ b/board/freescale/mpc8610hpcd/u-boot.lds
@@ -51,7 +51,6 @@ SECTIONS
   .text :
   {
     cpu/mpc86xx/start.o	(.text)
-    board/freescale/mpc8610hpcd/init.o (.bootpg)
     cpu/mpc86xx/traps.o (.text)
     cpu/mpc86xx/interrupts.o (.text)
     cpu/mpc86xx/cpu_init.o (.text)
diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile
index e73e7ba..115df05 100644
--- a/board/freescale/mpc8641hpcn/Makefile
+++ b/board/freescale/mpc8641hpcn/Makefile
@@ -27,8 +27,6 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS	:= $(BOARD).o law.o
 
-SOBJS	:= init.o
-
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
diff --git a/board/freescale/mpc8641hpcn/init.S b/board/freescale/mpc8641hpcn/init.S
deleted file mode 100644
index cb21ba6..0000000
--- a/board/freescale/mpc8641hpcn/init.S
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Jeff Brown
- * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc86xx.h>
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000     0x7fff_ffff     DDR                     2G
- * 0x8000_0000     0x9fff_ffff     PCI1 MEM                512M
- * 0xa000_0000     0xbfff_ffff     PCI2 MEM                512M
- * 0xc000_0000     0xdfff_ffff     RapidIO                 512M
- * 0xe200_0000     0xe2ff_ffff     PCI1 IO                 16M
- * 0xe300_0000     0xe3ff_ffff     PCI2 IO                 16M
- * 0xf800_0000     0xf80f_ffff     CCSRBAR                 1M
- * 0xf810_0000     0xf81f_ffff     PIXIS                   1M
- * 0xfe00_0000     0xffff_ffff     FLASH (boot bank)       32M
- *
- * Notes:
- *    CCSRBAR don't need a configured Local Access Window.
- *    If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
-#define LAWAR1	(LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-#else
-#define LAWBAR1 0
-#define LAWAR1  ((LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR2 ((CFG_PCI1_MEM_BASE>>12) & 0xffffff)
-#define LAWAR2	(LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff)
-#define LAWAR3	(LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-/*
- * This is not so much the SDRAM map as it is the whole localbus map.
- */
-#define LAWBAR4 ((0xf8100000>>12) & 0xffffff)
-#define LAWAR4	(LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M))
-
-#define LAWBAR5 ((CFG_PCI1_IO_PHYS>>12) & 0xffffff)
-#define LAWAR5	(LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR6 ((CFG_PCI2_IO_PHYS>>12) & 0xffffff)
-#define LAWAR6	(LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff)
-#define LAWAR7	(LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M))
-
-#if !defined(CONFIG_SPD_EEPROM)
-#define LAWBAR8 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
-#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-#else
-#define LAWBAR8 0
-#define LAWAR8  ((LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
-#endif
-
-#define LAWBAR9 ((CFG_RIO_MEM_PHYS>>12) & 0xfffff)
-#define LAWAR9  (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-	.section .bootpg, "ax"
-	.globl	law_entry
-law_entry:
-	lis	r7,CFG_CCSRBAR@h
-	ori	r7,r7,CFG_CCSRBAR@l
-
-	addi    r4,r7,0
-	addi    r5,r7,0
-
-	/* Skip LAWAR0, start at LAWAR1 */
-	lis     r6,LAWBAR1@h
-	ori     r6,r6,LAWBAR1@l
-	stwu    r6, 0xc28(r4)
-
-	lis     r6,LAWAR1@h
-	ori     r6,r6,LAWAR1@l
-	stwu    r6, 0xc30(r5)
-
-	/* LAWBAR2, LAWAR2 */
-	lis     r6,LAWBAR2@h
-	ori     r6,r6,LAWBAR2@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR2@h
-	ori     r6,r6,LAWAR2@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR3, LAWAR3 */
-	lis     r6,LAWBAR3@h
-	ori     r6,r6,LAWBAR3@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR3@h
-	ori     r6,r6,LAWAR3@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR4, LAWAR4 */
-	lis     r6,LAWBAR4@h
-	ori     r6,r6,LAWBAR4@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR4@h
-	ori     r6,r6,LAWAR4@l
-	stwu    r6, 0x20(r5)
-	/* LAWBAR5, LAWAR5 */
-	lis     r6,LAWBAR5@h
-	ori     r6,r6,LAWBAR5@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR5@h
-	ori     r6,r6,LAWAR5@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR6, LAWAR6 */
-	lis     r6,LAWBAR6@h
-	ori     r6,r6,LAWBAR6@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR6@h
-	ori     r6,r6,LAWAR6@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR7, LAWAR7 */
-	lis     r6,LAWBAR7@h
-	ori     r6,r6,LAWBAR7@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR7@h
-	ori     r6,r6,LAWAR7@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR8, LAWAR8 */
-	lis     r6,LAWBAR8@h
-	ori     r6,r6,LAWBAR8@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR8@h
-	ori     r6,r6,LAWAR8@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR9, LAWAR9 */
-	lis     r6,LAWBAR9@h
-	ori     r6,r6,LAWBAR9@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR9@h
-	ori     r6,r6,LAWAR9@l
-	stwu    r6, 0x20(r5)
-
-	blr
diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds
index 9900670..06d491b 100644
--- a/board/freescale/mpc8641hpcn/u-boot.lds
+++ b/board/freescale/mpc8641hpcn/u-boot.lds
@@ -51,7 +51,6 @@ SECTIONS
   .text      :
   {
     cpu/mpc86xx/start.o	(.text)
-    board/freescale/mpc8641hpcn/init.o (.bootpg)
     cpu/mpc86xx/traps.o (.text)
     cpu/mpc86xx/interrupts.o (.text)
     cpu/mpc86xx/cpu_init.o (.text)
diff --git a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile
index 8ecc951..115df05 100644
--- a/board/sbc8641d/Makefile
+++ b/board/sbc8641d/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS	:= $(BOARD).o law.o
-SOBJS	:= init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/sbc8641d/init.S b/board/sbc8641d/init.S
deleted file mode 100644
index c151d7e..0000000
--- a/board/sbc8641d/init.S
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright 2007 Wind River Systemes, Inc. <www.windriver.com>
- * Copyright 2007 Embedded Specialties, Inc.
- * Joe Hamman joe.hamman@embeddedspecialties.com
- *
- * Copyright 2004 Freescale Semiconductor.
- * Jeff Brown
- * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc86xx.h>
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000	0x0fff_ffff	DDR1	256M
- * 0x1000_0000	0x1fff_ffff	DDR2	256M
- * 0xe000_0000	0xffff_ffff	LBC	512M
- *
- * Notes:
- *   CCSRBAR doesn't need a configured Local Access Window.
- *   If flash is 8M at default position (last 8M), no LAW needed.
- */
-
-# DDR Bank 1
-# #define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
-# #define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-# DDR Bank 2
-# #define LAWBAR2 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff)
-# #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-# LBC
-# #define LAWBAR3 ((0xe0000000>>12) & 0xffffff)
-# #define LAWAR3 (LAWAR_EN & (LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_512M)))
-
-/*
- * LAW (Local Access Window) configuration:
- *
- * 0x0000_0000	DDR			256M
- * 0x1000_0000	DDR2			256M
- * 0x8000_0000	PCI1 MEM		512M
- * 0xa000_0000	PCI2 MEM		512M
- * 0xc000_0000	RapidIO			512M
- * 0xe200_0000	PCI1 IO			16M
- * 0xe300_0000	PCI2 IO			16M
- * 0xf800_0000	CCSRBAR			2M
- * 0xfe00_0000	FLASH (boot bank)	32M
- *
- */
-
-#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
-#define LAWAR1	(LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR2 ((CFG_PCI1_MEM_BASE>>12) & 0xffffff)
-#define LAWAR2	(LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff)
-#define LAWAR3	(~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)))
-
-#define LAWBAR4 ((0xf8000000>>12) & 0xffffff)
-#define LAWAR4	(LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M))
-
-#define LAWBAR5 ((CFG_PCI1_IO_BASE>>12) & 0xffffff)
-#define LAWAR5	(LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff)
-#define LAWAR6	(~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)))
-
-#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff)
-#define LAWAR7	(LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M))
-
-#define LAWBAR8 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff)
-#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR9 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR9  (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-	.section .bootpg, "ax"
-	.globl	law_entry
-law_entry:
-	lis	r7,CFG_CCSRBAR@h
-	ori	r7,r7,CFG_CCSRBAR@l
-
-	addi    r4,r7,0
-	addi    r5,r7,0
-
-	/* Skip LAWAR0, start at LAWAR1 */
-	lis     r6,LAWBAR1@h
-	ori     r6,r6,LAWBAR1@l
-	stwu    r6, 0xc28(r4)
-
-	lis     r6,LAWAR1@h
-	ori     r6,r6,LAWAR1@l
-	stwu    r6, 0xc30(r5)
-
-	/* LAWBAR2, LAWAR2 */
-	lis     r6,LAWBAR2@h
-	ori     r6,r6,LAWBAR2@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR2@h
-	ori     r6,r6,LAWAR2@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR3, LAWAR3 */
-	lis     r6,LAWBAR3@h
-	ori     r6,r6,LAWBAR3@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR3@h
-	ori     r6,r6,LAWAR3@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR4, LAWAR4 */
-	lis     r6,LAWBAR4@h
-	ori     r6,r6,LAWBAR4@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR4@h
-	ori     r6,r6,LAWAR4@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR5, LAWAR5 */
-	lis     r6,LAWBAR5@h
-	ori     r6,r6,LAWBAR5@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR5@h
-	ori     r6,r6,LAWAR5@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR6, LAWAR6 */
-	lis     r6,LAWBAR6@h
-	ori     r6,r6,LAWBAR6@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR6@h
-	ori     r6,r6,LAWAR6@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR7, LAWAR7 */
-	lis     r6,LAWBAR7@h
-	ori     r6,r6,LAWBAR7@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR7@h
-	ori     r6,r6,LAWAR7@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR8, LAWAR8 */
-	lis     r6,LAWBAR8@h
-	ori     r6,r6,LAWBAR8@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR8@h
-	ori     r6,r6,LAWAR8@l
-	stwu    r6, 0x20(r5)
-
-	/* LAWBAR9, LAWAR9 */
-	lis     r6,LAWBAR9@h
-	ori     r6,r6,LAWBAR9@l
-	stwu    r6, 0x20(r4)
-
-	lis     r6,LAWAR9@h
-	ori     r6,r6,LAWAR9@l
-	stwu    r6, 0x20(r5)
-
-	blr
diff --git a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds
index 5de9b78..be362ee 100644
--- a/board/sbc8641d/u-boot.lds
+++ b/board/sbc8641d/u-boot.lds
@@ -51,7 +51,6 @@ SECTIONS
   .text      :
   {
     cpu/mpc86xx/start.o	(.text)
-    board/sbc8641d/init.o (.bootpg)
     cpu/mpc86xx/traps.o (.text)
     cpu/mpc86xx/interrupts.o (.text)
     cpu/mpc86xx/cpu_init.o (.text)
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index bfea4b3..e501caf 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -1123,7 +1123,6 @@ spd_sdram(void)
 	int memsize_ddr1 = 0;
 	unsigned int law_size_ddr1;
 	volatile immap_t *immap = (immap_t *)CFG_IMMR;
-	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
 #ifdef CONFIG_DDR_INTERLEAVE
 	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
 #endif
@@ -1181,13 +1180,6 @@ spd_sdram(void)
 		 */
 #ifdef CONFIG_FSL_LAW
 		set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV);
-#else
-		mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
-		mcm->lawar1 = (LAWAR_EN
-			       | LAWAR_TRGT_IF_DDR_INTERLEAVED
-			       | (LAWAR_SIZE & law_size_interleaved));
-		debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1);
-		debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1);
 #endif
 		debug("Interleaved memory size is 0x%08lx\n", memsize_total);
 
@@ -1245,13 +1237,6 @@ spd_sdram(void)
 		 */
 #ifdef CONFIG_FSL_LAW
 		set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1);
-#else
-		mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
-		mcm->lawar1 = (LAWAR_EN
-			       | LAWAR_TRGT_IF_DDR1
-			       | (LAWAR_SIZE & law_size_ddr1));
-		debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1);
-		debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1);
 #endif
 	}
 
@@ -1281,18 +1266,6 @@ spd_sdram(void)
 		set_law(8,
 			(ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE),
 			law_size_ddr2, LAW_TRGT_IF_DDR_2);
-#else
-		if (ddr1_enabled)
-			mcm->lawbar8 = (((memsize_ddr1 * 1024 * 1024) >> 12)
-					& 0xfffff);
-		else
-			mcm->lawbar8 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
-
-		mcm->lawar8 = (LAWAR_EN
-			       | LAWAR_TRGT_IF_DDR2
-			       | (LAWAR_SIZE & law_size_ddr2));
-		debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8);
-		debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8);
 #endif
 	}
 
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index 8df27f7..f163521 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -283,11 +283,6 @@ in_flash:
 	bl      setup_ccsrbar
 #endif
 
-#ifndef CONFIG_FSL_LAW
-	bl	law_entry
-	sync
-#endif
-
 	/* run low-level CPU init code	   (from Flash) */
 	bl	cpu_init_f
 	sync