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| author | Jon Loeliger <jdl@freescale.com> | 2007-11-01 12:23:29 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-11-07 14:08:45 -0600 |
| commit | 9c84709eedce9c680dd695984ab7d2328f4f04f5 (patch) | |
| tree | 1b3b9f4cd30ddefa2ff125ec552314248c24340a | |
| parent | 607b3ae27efdb709719f0713113fcf4b073676c1 (diff) | |
| download | u-boot-imx-9c84709eedce9c680dd695984ab7d2328f4f04f5.zip u-boot-imx-9c84709eedce9c680dd695984ab7d2328f4f04f5.tar.gz u-boot-imx-9c84709eedce9c680dd695984ab7d2328f4f04f5.tar.bz2 | |
86xx: Fix broken variable reference when #def DEBUGing.
Sometimes you can't reference the DDR2 controller variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
| -rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 059097f..d57bcdf 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -1270,10 +1270,12 @@ spd_sdram(void) debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8); debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8); } + + debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2); + #endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */ - debug("\nMemory sizes are DDR1 = 0x%08lx, DDR2 = 0x%08lx\n", - memsize_ddr1, memsize_ddr2); + debug("\nMemory size of DDR1 = 0x%08lx\n", memsize_ddr1); /* * If neither DDR controller is enabled return 0. |