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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-10 16:08:39 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-11 17:49:13 +0900 |
| commit | 0efbbc5c613b28614eb3323145b5d3eda4a33188 (patch) | |
| tree | 93597a28d5a2520bafd79455725630a427fd06da /.travis.yml | |
| parent | e731a5385d1e8b0ffaa69977899dc4246de53db4 (diff) | |
| download | u-boot-imx-0efbbc5c613b28614eb3323145b5d3eda4a33188.zip u-boot-imx-0efbbc5c613b28614eb3323145b5d3eda4a33188.tar.gz u-boot-imx-0efbbc5c613b28614eb3323145b5d3eda4a33188.tar.bz2 | |
ARM: uniphier: refactor L2 zero-touching code in lowlevel_init
Here, the ldr pseudo-instruction falls into the ldr + data set.
The register access by [r1, #offset] produces shorter code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to '.travis.yml')
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