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| author | York Sun <yorksun@freescale.com> | 2014-12-08 15:30:55 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-01-23 22:29:13 -0600 |
| commit | dda3b610eee9dcd433627202584ded417327dd51 (patch) | |
| tree | de7d6037e6730f3fd9bc2baa086dd74f449d0fd6 /.mailmap | |
| parent | 37b608a52dcb13312a4f7ccea199cd6bac76d298 (diff) | |
| download | u-boot-imx-dda3b610eee9dcd433627202584ded417327dd51.zip u-boot-imx-dda3b610eee9dcd433627202584ded417327dd51.tar.gz u-boot-imx-dda3b610eee9dcd433627202584ded417327dd51.tar.bz2 | |
arm/ls1021a: Add workaround for DDR erratum A008378
Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions