Browse Source

Merge branch 'master' of /home/wd/git/u-boot/master

master
Wolfgang Denk 10 years ago
parent
commit
d963e84c92
844 changed files with 10877 additions and 14595 deletions
  1. +3
    -0
      .gitignore
  2. +7
    -4
      MAINTAINERS
  3. +7
    -31
      MAKEALL
  4. +23
    -97
      Makefile
  5. +14
    -16
      README
  6. +0
    -5
      arch/arm/config.mk
  7. +9
    -137
      arch/arm/cpu/arm1136/start.S
  8. +83
    -273
      arch/arm/cpu/arm1176/start.S
  9. +12
    -3
      arch/arm/cpu/arm1176/u-boot.lds
  10. +2
    -109
      arch/arm/cpu/arm720t/start.S
  11. +25
    -5
      arch/arm/cpu/arm920t/s3c24x0/speed.c
  12. +12
    -11
      arch/arm/cpu/arm920t/s3c24x0/timer.c
  13. +5
    -5
      arch/arm/cpu/arm920t/s3c24x0/usb.c
  14. +6
    -6
      arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
  15. +2
    -147
      arch/arm/cpu/arm920t/start.S
  16. +2
    -125
      arch/arm/cpu/arm925t/start.S
  17. +10
    -1
      arch/arm/cpu/arm926ejs/kirkwood/dram.c
  18. +4
    -4
      arch/arm/cpu/arm926ejs/mx25/reset.c
  19. +0
    -15
      arch/arm/cpu/arm926ejs/orion5x/dram.c
  20. +8
    -106
      arch/arm/cpu/arm926ejs/start.S
  21. +2
    -89
      arch/arm/cpu/arm946es/start.S
  22. +2
    -91
      arch/arm/cpu/arm_intcm/start.S
  23. +1
    -1
      arch/arm/cpu/armv7/mx5/clock.c
  24. +0
    -73
      arch/arm/cpu/armv7/mx5/u-boot.lds
  25. +0
    -24
      arch/arm/cpu/armv7/omap3/emif4.c
  26. +0
    -28
      arch/arm/cpu/armv7/omap3/sdrc.c
  27. +0
    -5
      arch/arm/cpu/armv7/omap4/board.c
  28. +8
    -122
      arch/arm/cpu/armv7/start.S
  29. +2
    -206
      arch/arm/cpu/ixp/start.S
  30. +2
    -118
      arch/arm/cpu/lh7a40x/start.S
  31. +1
    -1
      arch/arm/cpu/pxa/cpu.c
  32. +81
    -100
      arch/arm/cpu/pxa/start.S
  33. +8
    -11
      arch/arm/cpu/pxa/u-boot.lds
  34. +2
    -90
      arch/arm/cpu/s3c44b0/start.S
  35. +2
    -93
      arch/arm/cpu/sa1100/start.S
  36. +8
    -6
      arch/arm/include/asm/arch-mx25/imx-regs.h
  37. +11
    -0
      arch/arm/include/asm/arch-mx5/crm_regs.h
  38. +2
    -1
      arch/arm/include/asm/arch-mx5/imx-regs.h
  39. +0
    -328
      arch/arm/include/asm/arch-pxa/macro.h
  40. +161
    -0
      arch/arm/include/asm/arch-s3c24x0/s3c2440.h
  41. +375
    -297
      arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
  42. +2
    -0
      arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h
  43. +1
    -1
      arch/arm/include/asm/arch-s5pc1xx/mmc.h
  44. +11
    -3
      arch/arm/include/asm/arch-s5pc1xx/uart.h
  45. +0
    -3
      arch/arm/include/asm/config.h
  46. +1
    -3
      arch/arm/include/asm/global_data.h
  47. +0
    -6
      arch/arm/include/asm/u-boot-arm.h
  48. +0
    -257
      arch/arm/lib/board.c
  49. +0
    -2
      arch/arm/lib/bootm.c
  50. +0
    -19
      arch/arm/lib/cache-cp15.c
  51. +0
    -6
      arch/arm/lib/interrupts.c
  52. +1
    -0
      arch/avr32/cpu/start.S
  53. +2
    -0
      arch/avr32/include/asm/config.h
  54. +1
    -1
      arch/avr32/include/asm/global_data.h
  55. +2
    -2
      arch/avr32/lib/board.c
  56. +0
    -2
      arch/blackfin/config.mk
  57. +4
    -7
      arch/blackfin/include/asm/config.h
  58. +1
    -1
      arch/blackfin/include/asm/global_data.h
  59. +2
    -2
      arch/blackfin/lib/board.c
  60. +0
    -2
      arch/i386/include/asm/config.h
  61. +1
    -1
      arch/i386/include/asm/global_data.h
  62. +1
    -0
      arch/m68k/cpu/mcf5227x/start.S
  63. +1
    -0
      arch/m68k/cpu/mcf523x/start.S
  64. +1
    -0
      arch/m68k/cpu/mcf52x2/start.S
  65. +1
    -0
      arch/m68k/cpu/mcf532x/start.S
  66. +1
    -0
      arch/m68k/cpu/mcf5445x/start.S
  67. +1
    -0
      arch/m68k/cpu/mcf547x_8x/start.S
  68. +2
    -0
      arch/m68k/include/asm/config.h
  69. +1
    -1
      arch/m68k/include/asm/global_data.h
  70. +3
    -3
      arch/m68k/lib/board.c
  71. +2
    -1
      arch/microblaze/cpu/start.S
  72. +0
    -3
      arch/microblaze/include/asm/config.h
  73. +1
    -1
      arch/microblaze/include/asm/global_data.h
  74. +1
    -1
      arch/microblaze/lib/board.c
  75. +1
    -0
      arch/mips/cpu/cache.S
  76. +1
    -0
      arch/mips/cpu/start.S
  77. +2
    -0
      arch/mips/include/asm/config.h
  78. +1
    -1
      arch/mips/include/asm/global_data.h
  79. +2
    -2
      arch/mips/lib/board.c
  80. +1
    -1
      arch/nios2/cpu/start.S
  81. +0
    -3
      arch/nios2/include/asm/config.h
  82. +1
    -1
      arch/nios2/lib/board.c
  83. +3
    -2
      arch/powerpc/cpu/74xx_7xx/start.S
  84. +1
    -0
      arch/powerpc/cpu/mpc512x/start.S
  85. +1
    -0
      arch/powerpc/cpu/mpc5xx/start.S
  86. +1
    -0
      arch/powerpc/cpu/mpc5xxx/start.S
  87. +1
    -0
      arch/powerpc/cpu/mpc8220/start.S
  88. +1
    -0
      arch/powerpc/cpu/mpc824x/start.S
  89. +1
    -0
      arch/powerpc/cpu/mpc8260/start.S
  90. +1
    -1
      arch/powerpc/cpu/mpc83xx/cpu_init.c
  91. +3
    -2
      arch/powerpc/cpu/mpc83xx/start.S
  92. +1
    -0
      arch/powerpc/cpu/mpc85xx/release.S
  93. +1
    -0
      arch/powerpc/cpu/mpc85xx/start.S
  94. +3
    -2
      arch/powerpc/cpu/mpc86xx/start.S
  95. +1
    -0
      arch/powerpc/cpu/mpc8xx/start.S
  96. +13
    -12
      arch/powerpc/cpu/ppc4xx/start.S
  97. +0
    -3
      arch/powerpc/include/asm/config.h
  98. +1
    -1
      arch/powerpc/include/asm/global_data.h
  99. +15
    -1
      arch/powerpc/lib/board.c
  100. +1
    -1
      arch/sh/config.mk

+ 3
- 0
.gitignore View File

@ -40,6 +40,9 @@
/errlog
/reloc_off
/include/generated/
/lib/asm-offsets.s
# stgit generated dirs
patches-*
.stgit-edit.txt


+ 7
- 4
MAINTAINERS View File

@ -144,6 +144,8 @@ Dirk Eibach <eibach@gdsys.de>
dlvision PPC405EP
gdppc440etx PPC440EP/GR
intip PPC460EX
io PPC405EP
iocon PPC405EP
neo PPC405EP
Dave Ellis <DGE@sixnetio.com>
@ -462,10 +464,11 @@ Rune Torgersen <runet@innovsys.com>
Peter Tyser <ptyser@xes-inc.com>
XPEDITE1000 PPC440GX
XPEDITE5170 MPC8640
XPEDITE5200 MPC8548
XPEDITE5370 MPC8572
xpedite1000 PPC440GX
xpedite5170 MPC8640
xpedite5200 MPC8548
xpedite5370 MPC8572
xpedite5500 P2020
David Updegraff <dave@cray.com>


+ 7
- 31
MAKEALL View File

@ -56,7 +56,7 @@ LONG_OPTS="arch:,cpu:,vendor:,soc:"
# Option processing based on util-linux-2.13/getopt-parse.bash
# Note that we use `"$@"' to let each command-line parameter expand to a
# Note that we use `"$@"' to let each command-line parameter expand to a
# separate word. The quotes around `$@' are essential!
# We need TEMP as the `eval set --' would nuke the return value of
# getopt.
@ -554,9 +554,7 @@ LIST_mips_el=" \
## i386 Systems
#########################################################################
LIST_x86="$(boards_by_arch i386)
sc520_eNET \
"
LIST_x86="$(boards_by_arch i386)"
#########################################################################
## Nios-II Systems
@ -601,39 +599,17 @@ LIST_avr32="$(boards_by_arch avr32)"
## Blackfin Systems
#########################################################################
LIST_blackfin="$(boards_by_arch blackfin)
bf527-ezkit-v2
"
LIST_blackfin="$(boards_by_arch blackfin)"
#########################################################################
## SH Systems
#########################################################################
LIST_sh2=" \
rsk7203 \
"
LIST_sh3=" \
mpr2 \
ms7720se \
"
LIST_sh2="$(boards_by_cpu sh2)"
LIST_sh3="$(boards_by_cpu sh3)"
LIST_sh4="$(boards_by_cpu sh4)"
LIST_sh4=" \
ms7750se \
ms7722se \
MigoR \
r7780mp \
r2dplus \
sh7763rdp \
sh7785lcr \
ap325rxa \
espt \
"
LIST_sh=" \
${LIST_sh2} \
${LIST_sh3} \
${LIST_sh4} \
"
LIST_sh="$(boards_by_arch sh)"
#########################################################################
## SPARC Systems


+ 23
- 97
Makefile View File

@ -22,9 +22,9 @@
#
VERSION = 2010
PATCHLEVEL = 09
PATCHLEVEL = 12
SUBLEVEL =
EXTRAVERSION =
EXTRAVERSION = -rc1
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else
@ -357,7 +357,7 @@ $(obj)u-boot.imx: $(obj)u-boot.bin
-e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.kwb: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(KWD_CONFIG) -T kwbimage \
$(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
$(obj)u-boot.sha1: $(obj)u-boot.bin
@ -372,7 +372,8 @@ GEN_UBOOT = \
cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map u-boot.map -o u-boot
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) $(obj)u-boot.lds
$(obj)u-boot: depend \
$(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) $(obj)u-boot.lds
$(GEN_UBOOT)
ifeq ($(CONFIG_KALLSYMS),y)
smap=`$(call SYSTEM_MAP,u-boot) | \
@ -400,7 +401,7 @@ $(LDSCRIPT): depend
$(obj)u-boot.lds: $(LDSCRIPT)
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin
@ -426,7 +427,9 @@ updater:
# Explicitly make _depend in subdirs containing multiple targets to prevent
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(obj)include/autoconf.mk \
$(obj)include/generated/generic-asm-offsets.h
for dir in $(SUBDIRS) $(CPUDIR) $(dir $(LDSCRIPT)) ; do \
$(MAKE) -C $$dir _depend ; done
@ -473,6 +476,18 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
mv $@.tmp $@
$(obj)include/generated/generic-asm-offsets.h: $(obj)include/autoconf.mk.dep \
$(obj)lib/asm-offsets.s
@$(XECHO) Generating $@
tools/scripts/make-asm-offsets $(obj)lib/asm-offsets.s $@
$(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \
$(src)lib/asm-offsets.c
@mkdir -p $(obj)lib
$(CC) -DDO_DEPS_ONLY \
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
-o $@ $(src)lib/asm-offsets.c -c -S
#########################################################################
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
@ -1052,7 +1067,6 @@ mx31pdk_nand_config : unconfig
echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h; \
else \
echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h; \
echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h; \
fi
@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
@ -1176,96 +1190,6 @@ NIOS2_GENERIC = nios2-generic
$(NIOS2_GENERIC:%=%_config) : unconfig
@$(MKCONFIG) $@ nios2 nios2 nios2-generic altera
#========================================================================
# Blackfin
#========================================================================
bf527-ezkit-v2_config : unconfig
@$(MKCONFIG) -t BF527_EZKIT_REV_2_1 \
bf527-ezkit blackfin blackfin bf527-ezkit
#========================================================================
# SH3 (SuperH)
#========================================================================
#########################################################################
## sh2 (Renesas SuperH)
#########################################################################
rsk7203_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_RSK7203 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh2 rsk7203 renesas
#########################################################################
## sh3 (Renesas SuperH)
#########################################################################
mpr2_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh3 mpr2
ms7720se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh3 ms7720se
#########################################################################
## sh4 (Renesas SuperH)
#########################################################################
MigoR_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 MigoR renesas
ms7750se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 ms7750se
ms7722se_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 ms7722se
r2dplus_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 r2dplus renesas
r7780mp_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 r7780mp renesas
sh7763rdp_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 sh7763rdp renesas
sh7785lcr_32bit_config \
sh7785lcr_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/renesas/sh7785lcr
@echo "#define CONFIG_SH7785LCR 1" > $(obj)include/config.h
@if [ "$(findstring 32bit, $@)" ] ; then \
echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x8ff80000" > \
$(obj)board/renesas/sh7785lcr/config.tmp ; \
fi
@$(MKCONFIG) -n $@ -a sh7785lcr sh sh4 sh7785lcr renesas
ap325rxa_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_AP325RXA 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 ap325rxa renesas
espt_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ESPT 1" > $(obj)include/config.h
@$(MKCONFIG) -a $@ sh sh4 espt
#########################################################################
#########################################################################
@ -1296,6 +1220,7 @@ clean:
$(obj)u-boot.lds \
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)lib/asm-offsets.s
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
@rm -f $(ONENAND_BIN)
@ -1319,6 +1244,7 @@ clobber: clean
@rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
@rm -fr $(obj)include/generated
@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f


+ 14
- 16
README View File

@ -2364,11 +2364,11 @@ Configuration Settings:
- CONFIG_ENV_MAX_ENTRIES
Maximum number of entries in the hash table that is used
internally to store the environment settings. The default
setting is supposed to be generous and should work in most
cases. This setting can be used to tune behaviour; see
lib/hashtable.c for details.
Maximum number of entries in the hash table that is used
internally to store the environment settings. The default
setting is supposed to be generous and should work in most
cases. This setting can be used to tune behaviour; see
lib/hashtable.c for details.
The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
@ -2686,7 +2686,7 @@ Low Level (hardware related) configuration options:
area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
data is located at the end of the available space
(sometimes written as (CONFIG_SYS_INIT_RAM_END -
(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_GBL_DATA_OFFSET) downward.
@ -2836,19 +2836,17 @@ Low Level (hardware related) configuration options:
globally (CONFIG_CMD_MEM).
- CONFIG_SKIP_LOWLEVEL_INIT
- CONFIG_SKIP_RELOCATE_UBOOT
[ARM only] If this variable is defined, then certain
low level initializations (like setting up the memory
controller) are omitted and/or U-Boot does not
relocate itself into RAM.
[ARM only] If these variables are defined, then
certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does
not relocate itself into RAM.
Normally these variables MUST NOT be defined. The
only exception is when U-Boot is loaded (to RAM) by
some other boot loader or by a debugger which
performs these initializations itself.
Normally this variable MUST NOT be defined. The only
exception is when U-Boot is loaded (to RAM) by some
other boot loader or by a debugger which performs
these initializations itself.
- CONFIG_PRELOADER
Modifies the behaviour of start.S when compiling a loader
that is executed before the actual U-Boot. E.g. when
compiling a NAND SPL.


+ 0
- 5
arch/arm/config.mk View File

@ -33,9 +33,6 @@ STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
ifdef CONFIG_SYS_ARM_WITHOUT_RELOC
PLATFORM_CPPFLAGS += -DCONFIG_SYS_ARM_WITHOUT_RELOC
endif
PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
@ -68,9 +65,7 @@ endif
endif
LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
ifndef CONFIG_SYS_ARM_WITHOUT_RELOC
# needed for relocation
ifndef CONFIG_NAND_SPL
PLATFORM_LDFLAGS += -pie
endif
endif

+ 9
- 137
arch/arm/cpu/arm1136/start.S View File

@ -28,6 +28,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
.globl _start
@ -131,14 +132,11 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/*
* the actual reset code
*/
@ -217,7 +215,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@ -237,13 +234,13 @@ copy_loop:
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r9 /* r0 <- location to fix up in RAM */
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
@ -260,11 +257,10 @@ fixrel:
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
ble fixloop
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@ -296,8 +292,8 @@ _nand_boot_ofs
jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add r0, r0, r1
add lr, r0, r9
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
@ -315,112 +311,6 @@ _rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
#ifdef CONFIG_OMAP2420H4
/* Copy vectors to mask ROM indirect addr */
adr r0, _start /* r0 <- current position of code */
add r0, r0, #4 /* skip reset vector */
mov r2, #64 /* r2 <- size to copy */
add r2, r0, r2 /* r2 <- source end address */
mov r1, #SRAM_OFFSET0 /* build vect addr */
mov r3, #SRAM_OFFSET1
add r1, r1, r3
mov r3, #SRAM_OFFSET2
add r1, r1, r3
next:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
bne next /* loop until equal */
bl cpy_clk_code /* put dpll adjust code behind vectors */
#endif
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
#ifndef CONFIG_PRELOADER
beq stack_setup
#endif /* CONFIG_PRELOADER */
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
#ifdef CONFIG_PRELOADER
sub sp, r0, #128 /* leave 32 words for abort-stack */
#else
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
#endif /* CONFIG_PRELOADER */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
adr r2, _start
ldr r0, _bss_start_ofs /* find start of bss segment */
add r0, r0, r2
ldr r1, _bss_end_ofs /* stop here */
add r1, r1, r2
mov r2, #0x00000000 /* clear */
#ifndef CONFIG_PRELOADER
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif
ldr r0, _start_armboot_ofs
adr r1, _start
add r0, r0, r1
ldr pc, r0
_start_armboot_ofs:
#ifdef CONFIG_NAND_SPL
.word nand_boot - _start
#else
#ifdef CONFIG_ONENAND_IPL
.word start_oneboot - _start
#else
.word start_armboot - _start
#endif /* CONFIG_ONENAND_IPL */
#endif /* CONFIG_NAND_SPL */
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
*
@ -505,13 +395,7 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
#else
adr r2, _start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@ -542,13 +426,7 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
#else
adr r13, _start @ setup our mode stack (enter in banked mode)
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
@ -564,13 +442,7 @@ cpu_init_crit:
.macro get_bad_stack_swi
sub r13, r13, #4 @ space on current stack for scratch reg.
str r0, [r13] @ save R0's value.
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r0, IRQ_STACK_START_IN @ get data regions start
#else
ldr r0, _armboot_start @ get data regions start
sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
#endif
str lr, [r0] @ save caller lr in position 0 of saved stack
mrs r0, spsr @ get the spsr
str lr, [r0, #4] @ save spsr in position 1 of saved stack


+ 83
- 273
arch/arm/cpu/arm1176/start.S View File

@ -30,6 +30,7 @@
* Base codes by scsuh (sc.suh)
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#ifdef CONFIG_ENABLE_MMU
@ -107,52 +108,53 @@ _TEXT_BASE:
_TEXT_PHY_BASE:
.word CONFIG_SYS_PHY_UBOOT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
* relative position in the executable instead of leaving
* them null.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_end
_bss_end:
.word _end
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarel_start_ofs
_datarel_start_ofs:
.word __datarel_start - _start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarelrolocal_start_ofs
_datarelrolocal_start_ofs:
.word __datarelrolocal_start - _start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarellocal_start_ofs
_datarellocal_start_ofs:
.word __datarellocal_start - _start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _datarelro_start_ofs
_datarelro_start_ofs:
.word __datarelro_start - _start
.globl _got_start
_got_start:
.word __got_start
.globl _rel_dyn_start_ofs
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
.globl _got_end
_got_end:
.word __got_end
.globl _rel_dyn_end_ofs
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
.globl _dynsym_start_ofs
_dynsym_start_ofs:
.word __dynsym_start - _start
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
/*
* the actual reset code
@ -274,13 +276,11 @@ stack_setup:
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@ -288,26 +288,45 @@ copy_loop:
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r7, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
bne fixloop
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
@ -349,13 +368,11 @@ skip_hw_init:
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
@ -377,202 +394,20 @@ clbss_l:str r2, [r0] /* clear loop... */
_nand_boot: .word nand_boot
#else
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#endif
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x3f
orr r0, r0, #0xd3
msr cpsr, r0
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
cpu_init_crit:
/*
* When booting from NAND - it has definitely been a reset, so, no need
* to flush caches and disable the MMU
*/
#ifndef CONFIG_NAND_SPL
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
b mmu_disable
.align 5
/* Run in a single cache-line */
mmu_disable:
mcr p15, 0, r0, c1, c0, 0
nop
nop
mov pc, r2
mmu_disable_phys:
#ifdef CONFIG_DISABLE_TCM
/*
* Disable the TCMs
*/
mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
cmp r0, #0
beq skip_tcmdisable
mov r1, #0
mov r2, #1
tst r0, r2
mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
tst r0, r2, LSL #16
mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
skip_tcmdisable:
#endif
#endif
#ifdef CONFIG_PERIPORT_REMAP
/* Peri port setup */
ldr r0, =CONFIG_PERIPORT_BASE
orr r0, r0, #CONFIG_PERIPORT_SIZE
mcr p15,0,r0,c15,c2,4
#endif
/*
* Go setup Memory and board specific bits prior to relocation.
*/
bl lowlevel_init /* go setup pll,mux,memory */
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
/* enable domain access */
ldr r5, =0x0000ffff
mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
/* Set the TTB register */
ldr r0, _mmu_table_base
ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
ldr r2, =0xfff00000
bic r0, r0, r2
orr r1, r0, r1
mcr p15, 0, r1, c2, c0, 0
/* Enable the MMU */
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #1 /* Set CR_M to enable MMU */
/* Prepare to enable the MMU */
adr r1, skip_hw_init
and r1, r1, #0x3fc
ldr r2, _TEXT_BASE
ldr r3, =0xfff00000
and r2, r2, r3
orr r2, r2, r1
b mmu_enable
.align 5
/* Run in a single cache-line */
mmu_enable:
mcr p15, 0, r0, c1, c0, 0
nop
nop
mov pc, r2
skip_hw_init:
_board_init_r_ofs:
.word board_init_r - _start
#endif
/* Set up the stack */
stack_setup:
ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub sp, r0, #12 /* leave 3 words for abort-stack */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
mov r2, #0 /* clear */
clbss_l:
str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
blo clbss_l
#ifndef CONFIG_NAND_SPL
ldr pc, _start_armboot
_start_armboot:
.word start_armboot
#else
b nand_boot
/* .word nand_boot*/
#endif
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
#ifdef CONFIG_ENABLE_MMU
_mmu_table_base:
.word mmu_table
@ -659,14 +494,7 @@ phy_last_jump:
/* Save user registers (now in svc mode) r0-r12 */
stmia sp, {r0 - r12}
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
/* set base 2 words into abort stack */
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
#else
ldr r2, IRQ_STACK_START_IN
#endif
/* get values for "aborted" pc and cpsr (into parm regs) */
ldmia r2, {r2 - r3}
/* grab pointer to old stack */
@ -681,16 +509,7 @@ phy_last_jump:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* setup our mode stack (enter in banked mode) */
ldr r13, _armboot_start
/* move past malloc pool */
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
/* move to reserved a couple spots for abort stack */
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
/* save caller lr in position 0 of saved stack */
str lr, [r13]
@ -715,16 +534,7 @@ phy_last_jump:
sub r13, r13, #4
/* save R0's value. */
str r0, [r13]
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* get data regions start */
ldr r0, _armboot_start
/* move past malloc pool */
sub r0, r0, #(CONFIG_SYS_MALLOC_LEN)
/* move past gbl and a couple spots for abort stack */
sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */


+ 12
- 3
arch/arm/cpu/arm1176/u-boot.lds View File

@ -51,11 +51,14 @@ SECTIONS
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
@ -65,4 +68,10 @@ SECTIONS
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}

+ 2
- 109
arch/arm/cpu/arm720t/start.S View File

@ -23,7 +23,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/hardware.h>
@ -79,12 +79,6 @@ _fiq: .word fiq
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
*/
@ -108,7 +102,6 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
@ -197,7 +190,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
@ -222,9 +214,8 @@ fixloop:
str r4, [r2]
add r2, r2, #4
cmp r2, r3
bne fixloop
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
@ -264,92 +255,6 @@ clbss_l:str r2, [r0] /* clear loop... */
_board_init_r: .word board_init_r
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0x13
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
#ifdef CONFIG_LPC2292
bl lowlevel_init
#endif
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
#if CONFIG_SYS_TEXT_BASE
#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */
ldr r2, =0x0 /* Relocate the exception vectors */
cmp r1, r2 /* and associated data to address */
ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */
stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */
ldmneia r0, {r3-r9}
stmneia r2, {r3-r9}
adrne r0, _start /* restore r0 */
#endif /* !CONFIG_LPC2292 */
#endif
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
blo clbss_l
ldr pc, _start_armboot
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
*
@ -606,13 +511,7 @@ lock_loop:
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@ -643,13 +542,7 @@ lock_loop:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr


+ 25
- 5
arch/arm/cpu/arm920t/s3c24x0/speed.c View File

@ -54,9 +54,9 @@ static ulong get_PLLCLK(int pllreg)
ulong r, m, p, s;
if (pllreg == MPLL)
r = readl(&clk_power->MPLLCON);
r = readl(&clk_power->mpllcon);
else if (pllreg == UPLL)
r = readl(&clk_power->UPLLCON);
r = readl(&clk_power->upllcon);
else
hang();
@ -64,7 +64,12 @@ static ulong get_PLLCLK(int pllreg)
p = ((r & 0x003F0) >> 4) + 2;
s = r & 0x3;
#if defined(CONFIG_S3C2440)
if (pllreg == MPLL)
return 2 * m * (CONFIG_SYS_CLK_FREQ / (p << s));
#endif
return (CONFIG_SYS_CLK_FREQ * m) / (p << s);
}
/* return FCLK frequency */
@ -77,8 +82,23 @@ ulong get_FCLK(void)
ulong get_HCLK(void)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
return (readl(&clk_power->CLKDIVN) & 2) ? get_FCLK() / 2 : get_FCLK();
#ifdef CONFIG_S3C2440
switch (readl(&clk_power->clkdivn) & 0x6) {
default:
case 0:
return get_FCLK();
case 2:
return get_FCLK() / 2;
case 4:
return (readl(&clk_power->camdivn) & (1 << 9)) ?
get_FCLK() / 8 : get_FCLK() / 4;
case 6:
return (readl(&clk_power->camdivn) & (1 << 8)) ?
get_FCLK() / 6 : get_FCLK() / 3;
}
#else
return (readl(&clk_power->clkdivn) & 2) ? get_FCLK() / 2 : get_FCLK();
#endif
}
/* return PCLK frequency */
@ -86,7 +106,7 @@ ulong get_PCLK(void)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
return (readl(&clk_power->CLKDIVN) & 1) ? get_HCLK() / 2 : get_HCLK();
return (readl(&clk_power->clkdivn) & 1) ? get_HCLK() / 2 : get_HCLK();
}
/* return UCLK frequency */


+ 12
- 11
arch/arm/cpu/arm920t/s3c24x0/timer.c View File

@ -43,7 +43,7 @@ static inline ulong READ_TIMER(void)
{
struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
return readl(&timers->TCNTO4) & 0xffff;
return readl(&timers->tcnto4) & 0xffff;
}
static ulong timestamp;
@ -56,7 +56,7 @@ int timer_init(void)
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
writel(0x0f00, &timers->TCFG0);
writel(0x0f00, &timers->tcfg0);
if (timer_load_val == 0) {
/*
* for 10 ms clock period @ PCLK with 4 bit divider = 1/2
@ -68,13 +68,13 @@ int timer_init(void)
}
/* load value for 10 ms timeout */
lastdec = timer_load_val;
writel(timer_load_val, &timers->TCNTB4);
/* auto load, manual update of Timer 4 */
tmr = (readl(&timers->TCON) & ~0x0700000) | 0x0600000;
writel(tmr, &timers->TCON);
/* auto load, start Timer 4 */
writel(timer_load_val, &timers->tcntb4);
/* auto load, manual update of timer 4 */
tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000;
writel(tmr, &timers->tcon);
/* auto load, start timer 4 */
tmr = (tmr & ~0x0700000) | 0x0500000;
writel(tmr, &timers->TCON);
writel(tmr, &timers->tcon);
timestamp = 0;
return (0);
@ -181,6 +181,7 @@ ulong get_tbclk(void)
tbclk = timer_load_val * 100;
#elif defined(CONFIG_SBC2410X) || \
defined(CONFIG_SMDK2410) || \
defined(CONFIG_S3C2440) || \
defined(CONFIG_VCMA9)
tbclk = CONFIG_SYS_HZ;
#else
@ -206,13 +207,13 @@ void reset_cpu(ulong ignored)
watchdog = s3c24x0_get_base_watchdog();
/* Disable watchdog */
writel(0x0000, &watchdog->WTCON);
writel(0x0000, &watchdog->wtcon);
/* Initialize watchdog timer count register */
writel(0x0001, &watchdog->WTCNT);
writel(0x0001, &watchdog->wtcnt);
/* Enable watchdog timer; assert reset at timer timeout */
writel(0x0021, &watchdog->WTCON);
writel(0x0021, &watchdog->wtcon);
while (1)
/* loop forever and wait for reset to happen */;


+ 5
- 5
arch/arm/cpu/arm920t/s3c24x0/usb.c View File

@ -39,14 +39,14 @@ int usb_cpu_init(void)
* Set the 48 MHz UPLL clocking. Values are taken from
* "PLL value selection guide", 6-23, s3c2400_UM.pdf.
*/
writel((40 << 12) + (1 << 4) + 2, &clk_power->UPLLCON);
writel((40 << 12) + (1 << 4) + 2, &clk_power->upllcon);
/* 1 = use pads related USB for USB host */
writel(readl(&gpio->MISCCR) | 0x8, &gpio->MISCCR);
writel(readl(&gpio->misccr) | 0x8, &gpio->misccr);
/*
* Enable USB host clock.
*/
writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON);
writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
return 0;
}
@ -55,14 +55,14 @@ int usb_cpu_stop(void)
{
struct