Browse Source

Coding Style cleanup: replace leading SPACEs by TABs

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>
imx_v2014.04_3.10.31_1.1.0_beta
Wolfgang Denk 7 years ago
committed by Tom Rini
parent
commit
93e1459641
116 changed files with 506 additions and 506 deletions
  1. +2
    -2
      MAKEALL
  2. +10
    -10
      README
  3. +1
    -1
      arch/arm/config.mk
  4. +22
    -22
      arch/arm/cpu/armv7/mx5/lowlevel_init.S
  5. +1
    -1
      arch/arm/dts/exynos5250.dtsi
  6. +2
    -2
      arch/arm/lib/relocate.S
  7. +1
    -1
      arch/blackfin/cpu/traps.c
  8. +1
    -1
      arch/blackfin/include/asm/mach-common/bits/lockbox.h
  9. +1
    -1
      arch/m68k/lib/traps.c
  10. +1
    -1
      arch/nios2/cpu/epcs.c
  11. +1
    -1
      arch/nios2/lib/libgcc.c
  12. +2
    -2
      arch/openrisc/cpu/cpu.c
  13. +5
    -5
      arch/powerpc/cpu/mpc83xx/cpu_init.c
  14. +2
    -2
      arch/powerpc/cpu/mpc83xx/pci.c
  15. +2
    -2
      arch/powerpc/cpu/ppc4xx/4xx_pci.c
  16. +1
    -1
      board/Barix/ipam390/README.ipam390
  17. +2
    -2
      board/altera/common/sevenseg.c
  18. +26
    -26
      board/boundary/nitrogen6x/6x_upgrade.txt
  19. +5
    -5
      board/chromebook-x86/dts/alex.dts
  20. +5
    -5
      board/chromebook-x86/dts/link.dts
  21. +2
    -2
      board/cobra5272/bdm/cobra5272_uboot.gdb
  22. +1
    -1
      board/cogent/flash.c
  23. +3
    -3
      board/cray/L1/bootscript.hush
  24. +1
    -1
      board/esd/common/lcd.h
  25. +1
    -1
      board/esd/cpci750/ide.c
  26. +1
    -1
      board/esd/cpci750/pci.c
  27. +6
    -6
      board/etin/debris/flash.c
  28. +7
    -7
      board/evb64260/flash.c
  29. +2
    -2
      board/evb64260/mpsc.c
  30. +2
    -2
      board/fads/fads.c
  31. +1
    -1
      board/freescale/b4860qds/tlb.c
  32. +5
    -5
      board/freescale/bsc9132qds/README
  33. +2
    -2
      board/freescale/mpc8313erdb/mpc8313erdb.c
  34. +2
    -2
      board/freescale/mpc8360emds/mpc8360emds.c
  35. +3
    -3
      board/funkwerk/vovpn-gw/vovpn-gw.c
  36. +1
    -1
      board/gen860t/flash.c
  37. +2
    -2
      board/incaip/incaip.c
  38. +1
    -1
      board/matrix_vision/mvbc_p/Makefile
  39. +1
    -1
      board/matrix_vision/mvsmr/Makefile
  40. +61
    -61
      board/openrisc/openrisc-generic/or1ksim.cfg
  41. +1
    -1
      board/ppmc8260/strataflash.c
  42. +3
    -3
      board/pxa255_idp/pxa_reg_calcs.py
  43. +1
    -1
      board/rbc823/rbc823.c
  44. +3
    -3
      board/samsung/dts/exynos5250-snow.dts
  45. +1
    -1
      board/svm_sc8xx/svm_sc8xx.c
  46. +1
    -1
      boards.cfg
  47. +3
    -3
      common/cmd_bmp.c
  48. +1
    -1
      common/main.c
  49. +1
    -1
      config.mk
  50. +2
    -2
      doc/DocBook/Makefile
  51. +17
    -17
      doc/README.ext4
  52. +3
    -3
      doc/README.kwbimage
  53. +1
    -1
      doc/README.mxc_hab
  54. +12
    -12
      doc/README.mxsimage
  55. +1
    -1
      doc/README.nokia_rx51
  56. +5
    -5
      doc/README.ramboot-ppc85xx
  57. +12
    -12
      doc/README.trace
  58. +2
    -2
      doc/README.ubi
  59. +9
    -9
      doc/README.zfs
  60. +12
    -12
      doc/driver-model/UDM-cores.txt
  61. +6
    -6
      doc/driver-model/UDM-design.txt
  62. +2
    -2
      doc/driver-model/UDM-gpio.txt
  63. +5
    -5
      doc/driver-model/UDM-hwmon.txt
  64. +3
    -3
      doc/driver-model/UDM-mmc.txt
  65. +6
    -6
      doc/driver-model/UDM-power.txt
  66. +13
    -13
      doc/driver-model/UDM-rtc.txt
  67. +6
    -6
      doc/driver-model/UDM-spi.txt
  68. +14
    -14
      doc/driver-model/UDM-stdio.txt
  69. +1
    -1
      doc/driver-model/UDM-tpm.txt
  70. +3
    -3
      doc/driver-model/UDM-watchdog.txt
  71. +10
    -10
      drivers/mtd/nand/fsl_elbc_spl.c
  72. +4
    -4
      drivers/mtd/nand/fsl_upm.c
  73. +1
    -1
      drivers/mtd/nand/nand_base.c
  74. +2
    -2
      drivers/mtd/nand/nand_util.c
  75. +2
    -2
      drivers/mtd/ubi/crc32.c
  76. +1
    -1
      drivers/net/dm9000x.c
  77. +1
    -1
      drivers/net/plb2800_eth.c
  78. +1
    -1
      drivers/rtc/bfin_rtc.c
  79. +1
    -1
      drivers/rtc/pl031.c
  80. +2
    -2
      drivers/spi/mpc8xxx_spi.c
  81. +5
    -5
      drivers/spi/omap3_spi.c
  82. +1
    -1
      drivers/video/ati_radeon_fb.h
  83. +1
    -1
      fs/ubifs/super.c
  84. +1
    -1
      include/configs/DU440.h
  85. +1
    -1
      include/configs/P3G4.h
  86. +3
    -3
      include/configs/RBC823.h
  87. +1
    -1
      include/configs/alpr.h
  88. +2
    -2
      include/configs/devkit8000.h
  89. +1
    -1
      include/configs/p3mx.h
  90. +1
    -1
      include/configs/p3p440.h
  91. +1
    -1
      include/configs/pcs440ep.h
  92. +2
    -2
      include/configs/pdnb3.h
  93. +1
    -1
      include/configs/uc100.h
  94. +2
    -2
      include/configs/zeus.h
  95. +17
    -17
      include/ddr_spd.h
  96. +1
    -1
      nand_spl/nand_boot_fsl_elbc.c
  97. +1
    -1
      post/lib_powerpc/andi.c
  98. +16
    -16
      post/lib_powerpc/cpu_asm.h
  99. +3
    -3
      post/lib_powerpc/rlwimi.c
  100. +3
    -3
      post/lib_powerpc/rlwinm.c

+ 2
- 2
MAKEALL View File

@ -38,8 +38,8 @@ usage()
BUILD_NCPUS number of parallel make jobs (default: auto)
CROSS_COMPILE cross-compiler toolchain prefix (default: "")
CROSS_COMPILE_<ARCH> cross-compiler toolchain prefix for
architecture "ARCH". Substitute "ARCH" for any
supported architecture (default: "")
architecture "ARCH". Substitute "ARCH" for any
supported architecture (default: "")
MAKEALL_LOGDIR output all logs to here (default: ./LOG/)
BUILD_DIR output build directory (default: ./)
BUILD_NBUILDS number of parallel targets (default: 1)


+ 10
- 10
README View File

@ -944,10 +944,10 @@ The following options need to be configured:
- Regular expression support:
CONFIG_REGEX
If this variable is defined, U-Boot is linked against
the SLRE (Super Light Regular Expression) library,
which adds regex support to some commands, as for
example "env grep" and "setexpr".
If this variable is defined, U-Boot is linked against
the SLRE (Super Light Regular Expression) library,
which adds regex support to some commands, as for
example "env grep" and "setexpr".
- Device tree:
CONFIG_OF_CONTROL
@ -1096,8 +1096,8 @@ The following options need to be configured:
devices.
CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
- NETWORK Support (PCI):
CONFIG_E1000
@ -1987,7 +1987,7 @@ CBFS (Coreboot Filesystem) support
offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
bus.
- If your board supports a second fsl i2c bus, define
- If your board supports a second fsl i2c bus, define
CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
CONFIG_SYS_FSL_I2C2_SPEED for the speed and
CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
@ -3191,9 +3191,9 @@ FIT uImage format:
CONFIG_TPL_PAD_TO
Image offset to which the TPL should be padded before appending
the TPL payload. By default, this is defined as
CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
Modem Support:
--------------


+ 1
- 1
arch/arm/config.mk View File

@ -17,7 +17,7 @@ endif
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
-fno-common -ffixed-r9 -msoft-float
-fno-common -ffixed-r9 -msoft-float
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y


+ 22
- 22
arch/arm/cpu/armv7/mx5/lowlevel_init.S View File

@ -31,10 +31,10 @@
/* reconfigure L2 cache aux control reg */
ldr r0, =0xC0 | /* tag RAM */ \
0x4 | /* data RAM */ \
1 << 24 | /* disable write allocate delay */ \
1 << 23 | /* disable write allocate combine */ \
1 << 22 /* disable write allocate */
0x4 | /* data RAM */ \
1 << 24 | /* disable write allocate delay */ \
1 << 23 | /* disable write allocate combine */ \
1 << 22 /* disable write allocate */
#if defined(CONFIG_MX51)
ldr r3, [r4, #ROM_SI_REV]
@ -290,20 +290,20 @@ setup_pll_func:
setup_pll PLL1_BASE_ADDR, 800
setup_pll PLL3_BASE_ADDR, 400
setup_pll PLL3_BASE_ADDR, 400
/* Switch peripheral to PLL3 */
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x00015154
str r1, [r0, #CLKCTL_CBCMR]
ldr r1, =0x02898945
str r1, [r0, #CLKCTL_CBCDR]
/* make sure change is effective */
/* Switch peripheral to PLL3 */
ldr r0, =CCM_BASE_ADDR
ldr r1, =0x00015154
str r1, [r0, #CLKCTL_CBCMR]
ldr r1, =0x02898945
str r1, [r0, #CLKCTL_CBCDR]
/* make sure change is effective */
1: ldr r1, [r0, #CLKCTL_CDHIPR]
cmp r1, #0x0
bne 1b
cmp r1, #0x0
bne 1b
setup_pll PLL2_BASE_ADDR, 400
setup_pll PLL2_BASE_ADDR, 400
/* Switch peripheral to PLL2 */
ldr r0, =CCM_BASE_ADDR
@ -324,7 +324,7 @@ setup_pll_func:
cmp r1, #0x0
bne 1b
setup_pll PLL3_BASE_ADDR, 216
setup_pll PLL3_BASE_ADDR, 216
setup_pll PLL4_BASE_ADDR, 455
@ -358,13 +358,13 @@ setup_pll_func:
str r1, [r0, #CLKCTL_CCGR6]
str r1, [r0, #CLKCTL_CCGR7]
mov r1, #0x00000
str r1, [r0, #CLKCTL_CCDR]
mov r1, #0x00000
str r1, [r0, #CLKCTL_CCDR]
/* for cko - for ARM div by 8 */
mov r1, #0x000A0000
add r1, r1, #0x00000F0
str r1, [r0, #CLKCTL_CCOSR]
/* for cko - for ARM div by 8 */
mov r1, #0x000A0000
add r1, r1, #0x00000F0
str r1, [r0, #CLKCTL_CCOSR]
#endif /* CONFIG_MX53 */
.endm


+ 1
- 1
arch/arm/dts/exynos5250.dtsi View File

@ -140,7 +140,7 @@
reg = <0x12d40000 0x30>;
clock-frequency = <50000000>;
interrupts = <0 70 0>;
};
};
spi@131a0000 {
#address-cells = <1>;


+ 2
- 2
arch/arm/lib/relocate.S View File

@ -66,9 +66,9 @@ relocate_done:
/* ARMv4- don't know bx lr but the assembler fails to see that */
#ifdef __ARM_ARCH_4__
mov pc, lr
mov pc, lr
#else
bx lr
bx lr
#endif
ENDPROC(relocate_code)

+ 1
- 1
arch/blackfin/cpu/traps.c View File

@ -261,7 +261,7 @@ static void decode_address(char *buf, unsigned long address)
if (!address)
sprintf(buf, "<0x%p> /* Maybe null pointer? */", paddr);
else if (address >= CONFIG_SYS_MONITOR_BASE &&
address < CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
address < CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
sprintf(buf, "<0x%p> /* somewhere in u-boot */", paddr);
else
sprintf(buf, "<0x%p> /* unknown address */", paddr);


+ 1
- 1
arch/blackfin/include/asm/mach-common/bits/lockbox.h View File

@ -16,7 +16,7 @@ typedef struct SESR_args {
unsigned long ulMessageSize; /* message length in bytes */
unsigned long ulSFEntryPoint; /* entry point of secure function */
unsigned long ulMessagePtr; /* pointer to the buffer containing
the digital signature and message */
the digital signature and message */
unsigned long ulReserved1; /* reserved */
unsigned long ulReserved2; /* reserved */
} tSESR_args;


+ 1
- 1
arch/m68k/lib/traps.c View File

@ -20,7 +20,7 @@ extern void _int_handler(void);
static void show_frame(struct pt_regs *fp)
{
printf ("Vector Number: %d Format: %02x Fault Status: %01x\n\n", (fp->vector & 0x3fc) >> 2,
fp->format, (fp->vector & 0x3) | ((fp->vector & 0xc00) >> 8));
fp->format, (fp->vector & 0x3) | ((fp->vector & 0xc00) >> 8));
printf ("PC: %08lx SR: %08lx SP: %08lx\n", fp->pc, (long) fp->sr, (long) fp);
printf ("D0: %08lx D1: %08lx D2: %08lx D3: %08lx\n",
fp->d0, fp->d1, fp->d2, fp->d3);


+ 1
- 1
arch/nios2/cpu/epcs.c View File

@ -475,7 +475,7 @@ void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char * const argv[])
printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
stat,
(stat & EPCS_STATUS_WIP) ? 1 : 0,
(stat & EPCS_STATUS_WEL) ? 1 : 0,
(stat & EPCS_STATUS_WEL) ? 1 : 0,
(stat & dev->prot_mask) ? "on" : "off" );
/* Configuration */


+ 1
- 1
arch/nios2/lib/libgcc.c View File

@ -548,7 +548,7 @@ __mulsi3 (SItype a, SItype b)
while (cnt)
{
if (cnt & 1)
{
{
res += b;
}
b <<= 1;


+ 2
- 2
arch/openrisc/cpu/cpu.c View File

@ -138,8 +138,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
/* Code the jump to __reset here as the compiler is prone to
emitting a bad jump instruction if the function is in flash */
__asm__("l.movhi r1,hi(__reset); \
l.ori r1,r1,lo(__reset); \
l.jr r1");
l.ori r1,r1,lo(__reset); \
l.jr r1");
/* not reached, __reset does not return */
return 0;
}

+ 5
- 5
arch/powerpc/cpu/mpc83xx/cpu_init.c View File

@ -425,15 +425,15 @@ static int print_83xx_arb_event(int force)
};
int etype = (gd->arch.arbiter_event_attributes & AEATR_EVENT)
>> AEATR_EVENT_SHIFT;
>> AEATR_EVENT_SHIFT;
int mstr_id = (gd->arch.arbiter_event_attributes & AEATR_MSTR_ID)
>> AEATR_MSTR_ID_SHIFT;
>> AEATR_MSTR_ID_SHIFT;
int tbst = (gd->arch.arbiter_event_attributes & AEATR_TBST)
>> AEATR_TBST_SHIFT;
>> AEATR_TBST_SHIFT;
int tsize = (gd->arch.arbiter_event_attributes & AEATR_TSIZE)
>> AEATR_TSIZE_SHIFT;
>> AEATR_TSIZE_SHIFT;
int ttype = (gd->arch.arbiter_event_attributes & AEATR_TTYPE)
>> AEATR_TTYPE_SHIFT;
>> AEATR_TTYPE_SHIFT;
if (!force && !gd->arch.arbiter_event_address)
return 0;


+ 2
- 2
arch/powerpc/cpu/mpc83xx/pci.c View File

@ -67,7 +67,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
pci_ctrl->pibar1 = 0;
pci_ctrl->piebar1 = 0;
pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
i = hose->region_count++;
hose->regions[i].bus_start = 0;
@ -79,7 +79,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
hose->last_busno = 0xff;
pci_setup_indirect(hose, CONFIG_SYS_IMMR + 0x8300 + bus * 0x80,
CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
pci_register_hose(hose);


+ 2
- 2
arch/powerpc/cpu/ppc4xx/4xx_pci.c View File

@ -143,14 +143,14 @@ void pci_405gp_init(struct pci_controller *hose)
ptmla_str = getenv("ptm1la");
ptmms_str = getenv("ptm1ms");
if(NULL != ptmla_str && NULL != ptmms_str ) {
ptmla[0] = simple_strtoul (ptmla_str, NULL, 16);
ptmla[0] = simple_strtoul (ptmla_str, NULL, 16);
ptmms[0] = simple_strtoul (ptmms_str, NULL, 16);
}
ptmla_str = getenv("ptm2la");
ptmms_str = getenv("ptm2ms");
if(NULL != ptmla_str && NULL != ptmms_str ) {
ptmla[1] = simple_strtoul (ptmla_str, NULL, 16);
ptmla[1] = simple_strtoul (ptmla_str, NULL, 16);
ptmms[1] = simple_strtoul (ptmms_str, NULL, 16);
}
#endif


+ 1
- 1
board/Barix/ipam390/README.ipam390 View File

@ -50,7 +50,7 @@ TFTP from server 192.168.1.1; our IP address is 192.168.20.71
Filename '/tftpboot/ipam390/u-boot.ais'.
Load address: 0xc0000000
Loading: ##################################
1.5 MiB/s
1.5 MiB/s
done
Bytes transferred = 493716 (78894 hex)


+ 2
- 2
board/altera/common/sevenseg.c View File

@ -87,10 +87,10 @@ static inline void __sevenseg_set (unsigned int value)
#if (SEVENSEG_ACTIVE == 0)
sevenseg_portval = (sevenseg_portval & SEVENDEG_MASK_DP)
| ((~value) & (~SEVENDEG_MASK_DP));
| ((~value) & (~SEVENDEG_MASK_DP));
#else
sevenseg_portval = (sevenseg_portval & SEVENDEG_MASK_DP)
| (value);
| (value);
#endif
piop->data = sevenseg_portval;


+ 26
- 26
board/boundary/nitrogen6x/6x_upgrade.txt View File

@ -6,39 +6,39 @@ if ${fs}load ${dtype} ${disk}:1 12000000 u-boot.imx || ${fs}load ${dtype} ${disk
if sf probe || sf probe || \
sf probe 1 27000000 || sf probe 1 27000000 ; then
echo "probed SPI ROM" ;
if sf read 0x12400000 $offset $filesize ; then
if cmp.b 0x12000000 0x12400000 $filesize ; then
echo "------- U-Boot versions match" ;
else
echo "Need U-Boot upgrade" ;
echo "Program in 5 seconds" ;
for n in 5 4 3 2 1 ; do
echo $n ;
sleep 1 ;
done
if sf read 0x12400000 $offset $filesize ; then
if cmp.b 0x12000000 0x12400000 $filesize ; then
echo "------- U-Boot versions match" ;
else
echo "Need U-Boot upgrade" ;
echo "Program in 5 seconds" ;
for n in 5 4 3 2 1 ; do
echo $n ;
sleep 1 ;
done
echo "erasing" ;
sf erase 0 0x50000 ;
sf erase 0 0x50000 ;
# two steps to prevent bricking
echo "programming" ;
sf write 0x12000000 $offset $filesize ;
sf write 0x12000000 $offset $filesize ;
echo "verifying" ;
if sf read 0x12400000 $offset $filesize ; then
if cmp.b 0x12000000 0x12400000 $filesize ; then
while echo "---- U-Boot upgraded. reset" ; do
if sf read 0x12400000 $offset $filesize ; then
if cmp.b 0x12000000 0x12400000 $filesize ; then
while echo "---- U-Boot upgraded. reset" ; do
sleep 120
done
else
echo "Read verification error" ;
fi
else
echo "Error re-reading EEPROM" ;
fi
fi
else
echo "Error reading boot loader from EEPROM" ;
fi
else
echo "Read verification error" ;
fi
else
echo "Error re-reading EEPROM" ;
fi
fi
else
echo "Error reading boot loader from EEPROM" ;
fi
else
echo "Error initializing EEPROM" ;
echo "Error initializing EEPROM" ;
fi ;
else
echo "No U-Boot image found on SD card" ;


+ 5
- 5
board/chromebook-x86/dts/alex.dts View File

@ -3,8 +3,8 @@
/include/ "coreboot.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
model = "Google Alex";
compatible = "google,alex", "intel,atom-pineview";
@ -12,13 +12,13 @@
silent_console = <0>;
};
gpio: gpio {};
gpio: gpio {};
serial {
reg = <0x3f8 8>;
clock-frequency = <115200>;
};
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
};

+ 5
- 5
board/chromebook-x86/dts/link.dts View File

@ -3,8 +3,8 @@
/include/ "coreboot.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
model = "Google Link";
compatible = "google,link", "intel,celeron-ivybridge";
@ -12,15 +12,15 @@
silent_console = <0>;
};
gpio: gpio {};
gpio: gpio {};
serial {
reg = <0x3f8 8>;
clock-frequency = <115200>;
};
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
spi {
#address-cells = <1>;


+ 2
- 2
board/cobra5272/bdm/cobra5272_uboot.gdb View File

@ -1,11 +1,11 @@
#
# GDB Init script for the Coldfire 5272 processor.
#
# The main purpose of this script is to configure the
# The main purpose of this script is to configure the
# DRAM controller so code can be loaded.
#
# This file was changed to suite the senTec COBRA5272 board.
#
#
define addresses


+ 1
- 1
board/cogent/flash.c View File

@ -487,7 +487,7 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
if (haderr > 0) {
printf (" failed\n");
rcode = 1;
rcode = 1;
}
else
printf (" done\n");


+ 3
- 3
board/cray/L1/bootscript.hush View File

@ -47,7 +47,7 @@ else
echo no kernel to boot from $flash_krl, need tftp
fi
# Have a rootfs in flash?
# Have a rootfs in flash?
echo test for SQUASHfs at $flash_rfs
if imi $flash_rfs
@ -69,7 +69,7 @@ fi
# TFTP down a kernel
if printenv bootfile
then
then
tftp $tftp_addr $bootfile
setenv kernel $tftp_addr
echo I will boot the TFTP kernel
@ -90,7 +90,7 @@ if printenv rootpath
then
echo rootpath is $rootpath
if printenv initrd
then
then
echo initrd is also specified, so use $initrd
tftp $tftp2_addr $initrd
setenv bootargs root=/dev/ram0 rw cwsroot=$serverip:$rootpath $bootargs


+ 1
- 1
board/esd/common/lcd.h View File

@ -9,7 +9,7 @@
* Neutralize little endians.
*/
#define SWAP_LONG(data) ((unsigned long) \
(((unsigned long)(data) >> 24) | \
(((unsigned long)(data) >> 24) | \
((unsigned long)(data) << 24) | \
(((unsigned long)(data) >> 8) & 0x0000ff00 ) | \
(((unsigned long)(data) << 8) & 0x00ff0000 )))


+ 1
- 1
board/esd/cpci750/ide.c View File

@ -43,7 +43,7 @@ int ide_preinit (void)
if (devbusfn != -1) {
cpci_hd_type = 1;
} else {
devbusfn = pci_find_device (0x1095, 0x3114, 0);
devbusfn = pci_find_device (0x1095, 0x3114, 0);
if (devbusfn != -1) {
cpci_hd_type = 2;
}


+ 1
- 1
board/esd/cpci750/pci.c View File

@ -746,7 +746,7 @@ static int gt_read_config_dword (struct pci_controller *hose,
int bus = PCI_BUS (dev);
if ((bus == local_buses[0]) || (bus == local_buses[1])) {
*value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr,
*value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr,
offset | (PCI_FUNC(dev) << 8),
PCI_DEV (dev));
} else {


+ 6
- 6
board/etin/debris/flash.c View File

@ -323,7 +323,7 @@ int flash_erase (flash_info_t *flash, int s_first, int s_last)
if (prot)
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
prot);
else
printf ("\n");
@ -365,7 +365,7 @@ static const struct jedec_flash_info jedec_table[] = {
DevSize: SIZE_1MiB,
NumEraseRegions: 4,
regions: {ERASEINFO(0x10000,15),
ERASEINFO(0x08000,1),
ERASEINFO(0x08000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1)
}
@ -376,7 +376,7 @@ static const struct jedec_flash_info jedec_table[] = {
DevSize: SIZE_2MiB,
NumEraseRegions: 4,
regions: {ERASEINFO(0x10000,31),
ERASEINFO(0x08000,1),
ERASEINFO(0x08000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1)
}
@ -387,7 +387,7 @@ static const struct jedec_flash_info jedec_table[] = {
DevSize: SIZE_2MiB,
NumEraseRegions: 4,
regions: {ERASEINFO(0x04000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x02000,2),
ERASEINFO(0x08000,1),
ERASEINFO(0x10000,31)
}
@ -398,7 +398,7 @@ static const struct jedec_flash_info jedec_table[] = {
DevSize: SIZE_4MiB,
NumEraseRegions: 2,
regions: {ERASEINFO(0x10000,63),
ERASEINFO(0x02000,8)
ERASEINFO(0x02000,8)
}
}, {
@ -408,7 +408,7 @@ static const struct jedec_flash_info jedec_table[] = {
DevSize: SIZE_4MiB,
NumEraseRegions: 2,
regions: {ERASEINFO(0x02000,8),
ERASEINFO(0x10000,63)
ERASEINFO(0x10000,63)
}
}
};


+ 7
- 7
board/evb64260/flash.c View File

@ -60,7 +60,7 @@ flash_init (void)
#define CONFIG_SYS_BOOT_FLASH_WIDTH 1
#endif
size_b0 = flash_get_size(CONFIG_SYS_BOOT_FLASH_WIDTH, (vu_long *)base,
&flash_info[0]);
&flash_info[0]);
#ifndef CONFIG_P3G4
printf("[");
@ -97,17 +97,17 @@ flash_init (void)
#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
flash_get_info(CONFIG_SYS_MONITOR_BASE));
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
flash_get_info(CONFIG_SYS_MONITOR_BASE));
#endif
#ifdef CONFIG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
flash_get_info(CONFIG_ENV_ADDR));
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
flash_get_info(CONFIG_ENV_ADDR));
#endif
flash_size = size_b0 + size_b1;


+ 2
- 2
board/evb64260/mpsc.c View File

@ -785,7 +785,7 @@ galmpsc_shutdown(int mpsc)
GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF, 0);
GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF,
SDMA_TX_ABORT | SDMA_RX_ABORT);
SDMA_TX_ABORT | SDMA_RX_ABORT);
/* shut down the MPSC */
GT_REG_WRITE(GALMPSC_MCONF_LOW, 0);
@ -797,7 +797,7 @@ galmpsc_shutdown(int mpsc)
/* shut down the sdma engines. */
/* reset config to default */
GT_REG_WRITE(GALSDMA_0_CONF_REG + CHANNEL * GALSDMA_REG_DIFF,
0x000000fc);
0x000000fc);
udelay(100);


+ 2
- 2
board/fads/fads.c View File

@ -434,7 +434,7 @@ static int _initsdram(uint base, uint noMbytes)
*/
memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50MHz) */
/* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100MHz) */
/* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100MHz) */
udelay(200);
/* Run 8 refresh cycles */
@ -567,7 +567,7 @@ static int initsdram(uint base, uint *noMbytes)
if(!_initsdram(base, m))
{
*noMbytes += m;
*noMbytes += m;
return 0;
}
else


+ 1
- 1
board/freescale/b4860qds/tlb.c View File

@ -68,7 +68,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
0, 3, BOOKE_PAGESZ_256M, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000,
CONFIG_SYS_PCIE1_MEM_PHYS + 0x10000000,
CONFIG_SYS_PCIE1_MEM_PHYS + 0x10000000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_256M, 1),


+ 5
- 5
board/freescale/bsc9132qds/README View File

@ -23,14 +23,14 @@ Overview
ECC), up to 1333 MHz data rate
- Dedicated security engine featuring trusted boot
- Two DMA controllers
- OCNDMA with four bidirectional channels
- SysDMA with sixteen bidirectional channels
- OCNDMA with four bidirectional channels
- SysDMA with sixteen bidirectional channels
- Interfaces
- Four-lane SerDes PHY
- Four-lane SerDes PHY
- PCI Express controller complies with the PEX Specification-Rev 2.0
- Two Common Public Radio Interface (CPRI) controller lanes
- Two Common Public Radio Interface (CPRI) controller lanes
- High-speed USB 2.0 host and device controller with ULPI interface
- Enhanced secure digital (SD/MMC) host controller (eSDHC)
- Enhanced secure digital (SD/MMC) host controller (eSDHC)
- Antenna interface controller (AIC), supporting four industry
standard JESD207/four custom ADI RF interfaces
- ADI lanes support both full duplex FDD support & half duplex TDD


+ 2
- 2
board/freescale/mpc8313erdb/mpc8313erdb.c View File

@ -129,12 +129,12 @@ void board_init_f(ulong bootflag)
{
board_early_init_f();
NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
puts("NAND boot... ");
init_timebase();
initdram(0);
relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd,
CONFIG_SYS_NAND_U_BOOT_RELOC);
CONFIG_SYS_NAND_U_BOOT_RELOC);
}
void board_init_r(gd_t *gd, ulong dest_addr)


+ 2
- 2
board/freescale/mpc8360emds/mpc8360emds.c View File

@ -427,7 +427,7 @@ void ft_board_setup(void *blob, bd_t *bd)
if (prop) {
path = fdt_path_offset(blob, prop);
prop = fdt_getprop(blob, path,
"phy-connection-type", 0);
"phy-connection-type", 0);
if (prop && (strcmp(prop, "rgmii-id") == 0))
fdt_fixup_phy_connection(blob, path,
PHY_INTERFACE_MODE_RGMII_RXID);
@ -439,7 +439,7 @@ void ft_board_setup(void *blob, bd_t *bd)
if (prop) {
path = fdt_path_offset(blob, prop);
prop = fdt_getprop(blob, path,
"phy-connection-type", 0);
"phy-connection-type", 0);
if (prop && (strcmp(prop, "rgmii-id") == 0))
fdt_fixup_phy_connection(blob, path,
PHY_INTERFACE_MODE_RGMII_RXID);


+ 3
- 3
board/funkwerk/vovpn-gw/vovpn-gw.c View File

@ -270,9 +270,9 @@ int misc_init_r (void)
for (i = 0; i < 64; i++) {
c = *dummy;
printf( "UPMA[%02d]: 0x%08lx,0x%08lx: 0x%08lx\n",i,
memctl->memc_mamr,
memctl->memc_mar,
memctl->memc_mdr );
memctl->memc_mamr,
memctl->memc_mar,
memctl->memc_mdr );
}
memctl->memc_mamr = 0x00044440;
#endif


+ 1
- 1
board/gen860t/flash.c View File

@ -182,7 +182,7 @@ flash_get_offsets (ulong base, flash_info_t *info)
default:
printf ("Don't know sector offsets for FLASH"
" type 0x%lx\n", info->flash_id);
" type 0x%lx\n", info->flash_id);
return;
}
}


+ 2
- 2
board/incaip/incaip.c View File

@ -58,9 +58,9 @@ phys_size_t initdram(int board_type)
for (rows = 0xB; rows <= 0xD; rows++)
{
*INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
(rows << 4) | cols;
(rows << 4) | cols;
size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
max_sdram_size());
max_sdram_size());
if (size > max_size)
{


+ 1
- 1
board/matrix_vision/mvbc_p/Makefile View File

@ -19,7 +19,7 @@ OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
$(call cmd_link_o_target, $(OBJS))
#########################################################################


+ 1
- 1
board/matrix_vision/mvsmr/Makefile View File

@ -19,7 +19,7 @@ OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
$(call cmd_link_o_target, $(OBJS))
@mkimage -T script -C none -n mvSMR_Script -d bootscript $(obj)bootscript.img
#########################################################################


+ 61
- 61
board/openrisc/openrisc-generic/or1ksim.cfg View File

@ -20,8 +20,8 @@ the simulator.
not found too, it reverts to the built-in default configuration.
NOTE: Users should not rely on the built-in configuration, since the
default configuration may differ between version.
Rather create a configuration file that sets all critical values.
default configuration may differ between version.
Rather create a configuration file that sets all critical values.
This file may contain (standard C) comments only - no // support.
@ -306,7 +306,7 @@ end
debug = 0-9
0 : no debug messages
1-9: debug message level.
higher numbers produce more messages
higher numbers produce more messages
profile = 0/1
'0': don't generate profiling file 'sim.profile'
@ -375,11 +375,11 @@ end
Core Verification.
enabled = 0/1
'0': disbable VAPI server
'1': enable/start VAPI server
'0': disbable VAPI server
'1': enable/start VAPI server
server_port = <value>
TCP/IP port to start VAPI server on
TCP/IP port to start VAPI server on
log_enabled = 0/1
'0': disable VAPI requests logging
@ -565,56 +565,56 @@ end
This section configures the UARTs
enabled = <0|1>
Enable/disable the peripheral. By default if it is enabled.
Enable/disable the peripheral. By default if it is enabled.
baseaddr = <hex_value>
address of first UART register for this device
address of first UART register for this device
channel = <channeltype>:<args>
The channel parameter indicates the source of received UART characters
and the sink for transmitted UART characters.
The channel parameter indicates the source of received UART characters
and the sink for transmitted UART characters.
The <channeltype> can be either "file", "xterm", "tcp", "fd", or "tty"
(without quotes).
The <channeltype> can be either "file", "xterm", "tcp", "fd", or "tty"
(without quotes).
A) To send/receive characters from a pair of files, use a file
channel:
A) To send/receive characters from a pair of files, use a file
channel:
channel=file:<rxfile>,<txfile>
channel=file:<rxfile>,<txfile>
B) To create an interactive terminal window, use an xterm channel:
channel=xterm:[<xterm_arg>]*
channel=xterm:[<xterm_arg>]*
C) To create a bidirectional tcp socket which one could, for example,
access via telnet, use a tcp channel:
access via telnet, use a tcp channel:
channel=tcp:<port number>
channel=tcp:<port number>
D) To cause the UART to read/write from existing numeric file
descriptors, use an fd channel:
descriptors, use an fd channel:
channel=fd:<rx file descriptor num>,<tx file descriptor num>
channel=fd:<rx file descriptor num>,<tx file descriptor num>
E) To connect the UART to a physical serial port, create a tty
channel:
E) To connect the UART to a physical serial port, create a tty
channel:
channel=tty:device=/dev/ttyS0,baud=9600
irq = <value>
irq number for this device
irq number for this device
16550 = 0/1
'0': this device is a UART16450
'1': this device is a UART16550
'0': this device is a UART16450
'1': this device is a UART16550
jitter = <value>
in msecs... time to block, -1 to disable it
in msecs... time to block, -1 to disable it
vapi_id = <hex_value>
VAPI id of this instance
VAPI id of this instance
*/
section uart
@ -634,16 +634,16 @@ end
This section configures the DMAs
enabled = <0|1>
Enable/disable the peripheral. By default if it is enabled.
Enable/disable the peripheral. By default if it is enabled.
baseaddr = <hex_value>
address of first DMA register for this device
address of first DMA register for this device
irq = <value>
irq number for this device
irq number for this device
vapi_id = <hex_value>
VAPI id of this instance
VAPI id of this instance
*/
section dma
@ -658,37 +658,37 @@ end
This section configures the ETHERNETs
enabled = <0|1>
Enable/disable the peripheral. By default if it is enabled.
Enable/disable the peripheral. By default if it is enabled.
baseaddr = <hex_value>
address of first ethernet register for this device
address of first ethernet register for this device
dma = <value>
which controller is this ethernet "connected" to
which controller is this ethernet "connected" to
irq = <value>
ethernet mac IRQ level
ethernet mac IRQ level
rtx_type = <value>
use 0 - file interface, 1 - socket interface
use 0 - file interface, 1 - socket interface
rx_channel = <value>
DMA channel used for RX
DMA channel used for RX
tx_channel = <value>
DMA channel used for TX
DMA channel used for TX
rxfile = "<filename>"
filename, where to read data from
filename, where to read data from
txfile = "<filename>"
filename, where to write data to
filename, where to write data to
sockif = "<ifacename>"
interface name of ethernet socket
interface name of ethernet socket
vapi_id = <hex_value>
VAPI id of this instance
VAPI id of this instance
*/
section ethernet
@ -711,16 +711,16 @@ end
This section configures the GPIOs
enabled = <0|1>
Enable/disable the peripheral. By default if it is enabled.
Enable/disable the peripheral. By default if it is enabled.
baseaddr = <hex_value>
address of first GPIO register for this device
address of first GPIO register for this device
irq = <value>
irq number for this device
irq number for this device
base_vapi_id = <hex_value>
first VAPI id of this instance
first VAPI id of this instance
GPIO uses 8 consecutive VAPI IDs
*/
@ -736,19 +736,19 @@ end
This section configures the VGA/LCD controller
enabled = <0|1>
Enable/disable the peripheral. By default if it is enabled.
Enable/disable the peripheral. By default if it is enabled.
baseaddr = <hex_value>
address of first VGA register
address of first VGA register
irq = <value>
irq number for this device
irq number for this device
refresh_rate = <value>
number of cycles between screen dumps
number of cycles between screen dumps
filename = "<filename>"
template name for generated names (e.g. "primary" produces "primary0023.bmp")
template name for generated names (e.g. "primary" produces "primary0023.bmp")
*/
section vga
@ -825,39 +825,39 @@ end
This section configures the ATA/ATAPI host controller
baseaddr = <hex_value>
address of first ATA register
address of first ATA register
enabled = <0|1>
Enable/disable the peripheral. By default if it is enabled.
Enable/disable the peripheral. By default if it is enabled.
irq = <value>
irq number for this device
irq number for this device
debug = <value>
debug level for ata models.
debug level for ata models.
0: no debug messages
1: verbose messages
3: normal messages (more messages than verbose)
5: debug messages (normal debug messages)
5: debug messages (normal debug messages)
7: flow control messages (debug statemachine flows)
9: low priority message (display everything the code does)
dev_type0/1 = <value>
ata device 0 type
0: NO_CONNeCT: none (not connected)
ata device 0 type
0: NO_CONNeCT: none (not connected)
1: FILE : simulated harddisk
2: LOCAL : local system harddisk
dev_file0/1 = "<filename>"
filename for simulated ATA device
filename for simulated ATA device
valid only if dev_type0 == 1
dev_size0/1 = <value>
size of simulated hard-disk (in MBytes)
size of simulated hard-disk (in MBytes)
valid only if dev_type0 == 1
dev_packet0/1 = <value>
0: simulated ATA device does NOT implement PACKET command feature set
0: simulated ATA device does NOT implement PACKET command feature set
1: simulated ATA device does implement PACKET command feature set
FIXME: irq number


+ 1
- 1
board/ppmc8260/strataflash.c View File

@ -407,7 +407,7 @@ static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout
printf("Command Sequence Error.\n");
} else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
printf("Block Erase Error.\n");
retcode = ERR_NOT_ERASED;
retcode = ERR_NOT_ERASED;
} else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
printf("Locking Error\n");
}


+ 3
- 3
board/pxa255_idp/pxa_reg_calcs.py View File

@ -21,7 +21,7 @@ class gpio:
self.clr = clr
self.alt = alt
self.desc = desc
# the following is a dictionary of all GPIOs in the system
# the key is the GPIO number
@ -280,8 +280,8 @@ for reg in registers:
# print define to past right into U-Boot source code
print
print
print
print
for reg in registers:
print '#define %s 0x%x' % (uboot_reg_names[reg], pxa_regs[reg])


+ 1
- 1
board/rbc823/rbc823.c View File

@ -78,7 +78,7 @@ const uint static_table[] =
0x0FFFFC04, 0x0FF3FC04, 0x0FF3CC04, 0x0FF3CC04,
0x0FF3EC04, 0x0FF3CC00, 0x0FF7FC04, 0x3FFFFC04,
0xFFFFFC04, 0xFFFFFC05, /* last */
_NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,


+ 3
- 3
board/samsung/dts/exynos5250-snow.dts View File

@ -71,9 +71,9 @@
codec-enable-gpio = <&gpio 0xb7 0>;
};
sound@12d60000 {
status = "disabled";
};
sound@12d60000 {
status = "disabled";
};
i2c@12cd0000 {
soundcodec@22 {


+ 1
- 1
board/svm_sc8xx/svm_sc8xx.c View File

@ -139,6 +139,6 @@ phys_size_t initdram (int board_type)
#if defined(CONFIG_CMD_DOC)
void doc_init (void)
{
doc_probe (CONFIG_SYS_DOC_BASE);
doc_probe (CONFIG_SYS_DOC_BASE);
}
#endif

+ 1
- 1
boards.cfg View File

@ -196,7 +196,7 @@ Active arm arm926ejs mb86r0x syteco jadecpu
Active arm arm926ejs mx25 freescale mx25pdk mx25pdk mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg Fabio Estevam <fabio.estevam@freescale.com>
Active arm arm926ejs mx25 karo tx25 tx25 - John Rigby <jcrigby@gmail.com>
Active arm arm926ejs mx25 syteco zmx25 zmx25 - Matthias Weisser <weisserm@arcor.de>
Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes <tremyfr@yahoo.fr>:Eric Jarrige <eric.jarrige@armadeus.org>
Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes <tremyfr@yahoo.fr>:Eric Jarrige <eric.jarrige@armadeus.org>
Active arm arm926ejs mx27 logicpd imx27lite imx27lite - Wolfgang Denk <wd@denx.de>
Active arm arm926ejs mx27 logicpd imx27lite magnesium - Heiko Schocher <hs@denx.de>
Active arm arm926ejs mxs bluegiga apx4devkit apx4devkit apx4devkit Lauri Hintsala <lauri.hintsala@bluegiga.com>


+ 3
- 3
common/cmd_bmp.c View File

@ -121,9 +121,9 @@ static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char * const ar
break;
case 4:
addr = simple_strtoul(argv[1], NULL, 16);
x = simple_strtoul(argv[2], NULL, 10);
y = simple_strtoul(argv[3], NULL, 10);
break;
x = simple_strtoul(argv[2], NULL, 10);
y = simple_strtoul(argv[3], NULL, 10);
break;
default:
return CMD_RET_USAGE;
}


+ 1
- 1
common/main.c View File

@ -365,7 +365,7 @@ static void process_boot_delay(void)
#ifdef CONFIG_BOOTCOUNT_LIMIT
if (bootlimit && (bootcount > bootlimit)) {
printf ("Warning: Bootlimit (%u) exceeded. Using altbootcmd.\n",
(unsigned)bootlimit);
(unsigned)bootlimit);
s = getenv ("altbootcmd");
}
else


+ 1
- 1
config.mk View File

@ -320,7 +320,7 @@ endif
# Linus' kernel sanity checking tool
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
-Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF)
-Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF)
# Location of a usable BFD library, where we define "usable" as
# "built for ${HOST}, supports ${TARGET}". Sensible values are


+ 2
- 2
doc/DocBook/Makefile View File

@ -134,7 +134,7 @@ build_main_index = rm -rf $(main_idx); \
quiet_cmd_db2html = HTML $@
cmd_db2html = xmlto html $(XMLTOFLAGS) -o $(patsubst %.html,%,$@) $< && \
echo '<a HREF="$(patsubst %.html,%,$(notdir $@))/index.html"> \
$(patsubst %.html,%,$(notdir $@))</a><p>' > $@
$(patsubst %.html,%,$(notdir $@))</a><p>' > $@
%.html: %.xml
@(which xmlto > /dev/null 2>&1) || \
@ -143,7 +143,7 @@ quiet_cmd_db2html = HTML $@
@rm -rf $@ $(patsubst %.html,%,$@)
$(call cmd_db2html)
@if [ ! -z "$(PNG-$(basename $(notdir $@)))" ]; then \
cp $(PNG-$(basename $(notdir $@))) $(patsubst %.html,%,$@); fi
cp $(PNG-$(basename $(notdir $@))) $(patsubst %.html,%,$@); fi
quiet_cmd_db2man = MAN $@
cmd_db2man = if grep -q refentry $<; then xmlto man $(XMLTOFLAGS) -o $(obj)/man $< ; gzip -f $(obj)/man/*.9; fi


+ 17
- 17
doc/README.ext4 View File

@ -28,30 +28,30 @@ Steps to test:
1. After applying the patch, ext4 specific commands can be seen
in the boot loader prompt using
UBOOT #help
UBOOT #help
ext4load- load binary file from a Ext4 file system
ext4ls - list files in a directory (default /)
ext4write- create a file in ext4 formatted partition
ext4load- load binary file from a Ext4 file system
ext4ls - list files in a directory (default /)
ext4write- create a file in ext4 formatted partition
2. To list the files in ext4 formatted partition, execute
ext4ls <interface> <dev[:part]> [directory]
For example:
UBOOT #ext4ls mmc 0:5 /usr/lib
ext4ls <interface> <dev[:part]> [directory]
For example:
UBOOT #ext4ls mmc 0:5 /usr/lib
3. To read and load a file from an ext4 formatted partition to RAM, execute
ext4load <interface> <dev[:part]> [addr] [filename] [bytes]
For example:
UBOOT #ext4load mmc 2:2 0x30007fc0 uImage
ext4load <interface> <dev[:part]> [addr] [filename] [bytes]
For example:
UBOOT #ext4load mmc 2:2 0x30007fc0 uImage
4. To write a file to a ext4 formatted partition.
a) First load a file to RAM at a particular address for example 0x30007fc0.
Now execute ext4write command
ext4write <interface> <dev[:part]> [filename] [Address] [sizebytes]
For example:
UBOOT #ext4write mmc 2:2 /boot/uImage 0x30007fc0 6183120
(here 6183120 is the size of the file to be written)
Note: Absolute path is required for the file to be written
a) First load a file to RAM at a particular address for example 0x30007fc0.
Now execute ext4write command
ext4write <interface> <dev[:part]> [filename] [Address] [sizebytes]
For example:
UBOOT #ext4write mmc 2:2 /boot/uImage 0x30007fc0 6183120
(here 6183120 is the size of the file to be written)
Note: Absolute path is required for the file to be written
References :
-- ext4 implementation in Linux Kernel


+ 3
- 3
doc/README.kwbimage View File

@ -40,9 +40,9 @@ Board specific configuration file specifications:
------------------------------------------------
1. This file must present in the $(BOARDDIR). The default name is
kwbimage.cfg. The name can be set as part of the full path
to the file using CONFIG_SYS_KWD_CONFIG (probably in
include/configs/<yourboard>.h). The path should look like:
$(SRCTREE)/$(CONFIG_BOARDDIR)/<yourkwbimagename>.cfg
to the file using CONFIG_SYS_KWD_CONFIG (probably in
include/configs/<yourboard>.h). The path should look like:
$(SRCTREE)/$(CONFIG_BOARDDIR)/<yourkwbimagename>.cfg
2. This file can have empty lines and lines starting with "#" as first
character to put comments
3. This file can have configuration command lines as mentioned below,


+ 1
- 1
doc/README.mxc_hab View File

@ -20,7 +20,7 @@ Data Size: 327680 Bytes = 320.00 kB = 0.31 MB
Load Address: 177ff420
Entry Point: 17800000
HAB Blocks: 177ff400 00000000 0004dc00
^^^^^^^^ ^^^^^^^^ ^^^^^^^^
^^^^^^^^ ^^^^^^^^ ^^^^^^^^
| | |
| | -------- (1)
| |


+ 12
- 12
doc/README.mxsimage View File

@ -10,7 +10,7 @@ The mxsimage tool is targeted to be a simple replacement for the elftosb2 .
To generate an image, write an image configuration file and run:
mkimage -A arm -O u-boot -T mxsimage -n <path to configuration file> \
<output bootstream file>
<output bootstream file>
The output bootstream file is usually using the .sb file extension. Note
that the example configuration files for producing bootable BootStream with
@ -54,33 +54,33 @@ These semantics and rules will be outlined now.
LOAD u32_address string_filename
- Instructs the BootROM to load file pointed by "string_filename" onto
address "u32_address".
address "u32_address".
LOAD IVT u32_address u32_IVT_entry_point
- Crafts and loads IVT onto address "u32_address" with the entry point
of u32_IVT_entry_point.
of u32_IVT_entry_point.
- i.MX28-specific instruction!
LOAD DCD u32_address u32_DCD_block_ID
- Loads the DCD block with ID "u32_DCD_block_ID" onto address
"u32_address" and executes the contents of this DCD block
"u32_address" and executes the contents of this DCD block
- i.MX28-specific instruction!
FILL u32_address u32_pattern u32_length
- Starts to write memory from addres "u32_address" with a pattern
specified by "u32_pattern". Writes exactly "u32_length" bytes of the
specified by "u32_pattern". Writes exactly "u32_length" bytes of the
pattern.
JUMP [HAB] u32_address [u32_r0_arg]
- Jumps onto memory address specified by "u32_address" by setting this
address in PT. The BootROM will pass the "u32_r0_arg" value in ARM
address in PT. The BootROM will pass the "u32_r0_arg" value in ARM
register "r0" to the executed code if this option is specified.
Otherwise, ARM register "r0" will default to value 0x00000000. The
optional "HAB" flag is i.MX28-specific flag turning on the HAB boot.
CALL [HAB] u32_address [u32_r0_arg]
- See JUMP instruction above, as the operation is exactly the same with
one difference. The CALL instruction does allow returning into the
one difference. The CALL instruction does allow returning into the
BootROM from the executed code. U-Boot makes use of this in it's SPL
code.
@ -88,10 +88,10 @@ These semantics and rules will be outlined now.
- Restart the CPU and start booting from device specified by the
"string_mode" argument. The "string_mode" differs for each CPU
and can be:
i.MX23, string_mode = USB/I2C/SPI1_FLASH/SPI2_FLASH/NAND_BCH
JTAG/SPI3_EEPROM/SD_SSP0/SD_SSP1
i.MX28, string_mode = USB/I2C/SPI2_FLASH/SPI3_FLASH/NAND_BCH
JTAG/SPI2_EEPROM/SD_SSP0/SD_SSP1