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MLK-16431-3 imx8qxp_mek: Enable the USB3.0 XHCI driver

Enable the USB3.0 XHCI driver to support host mode on MEK board.
The USB3.0 typec on MEK board uses PTN5110 TCPC as cc logic and power control. Different like
the device on ARM2 board, this IC needs driver to control and get status through I2C bus.

In this patch, we simply call the TCPC API to set to DFP mode, check the CC status for SS MUX select
and enable source VBUS power. When the USB host is shutdown, disable the VBUS power.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 34be5a2100)
o8.0.0_1.1.0_8qm-ear
Ye Li 3 years ago
parent
commit
8023d47718
4 changed files with 110 additions and 6 deletions
  1. +4
    -0
      arch/arm/dts/fsl-imx8qxp-mek.dts
  2. +86
    -0
      board/freescale/imx8qxp_mek/imx8qxp_mek.c
  3. +9
    -5
      configs/imx8qxp_mek_defconfig
  4. +11
    -1
      include/configs/imx8qxp_mek.h

+ 4
- 0
arch/arm/dts/fsl-imx8qxp-mek.dts View File

@ -403,3 +403,7 @@
vmmc-supply = <&reg_usdhc2_vmmc>;
status = "okay";
};
&usb2 {
status = "okay";
};

+ 86
- 0
board/freescale/imx8qxp_mek/imx8qxp_mek.c View File

@ -28,6 +28,7 @@
#include <asm/imx-common/video.h>
#include <asm/arch/video_common.h>
#include <power-domain.h>
#include "../common/tcpc.h"
DECLARE_GLOBAL_DATA_PTR;
@ -340,6 +341,7 @@ static int setup_fec(int ind)
static iomux_cfg_t board_gpios[] = {
SC_P_SPI2_SDO | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
};
static void board_gpio_init(void)
@ -421,6 +423,86 @@ static void setup_otg(void)
}
#endif
#ifdef CONFIG_USB_XHCI_IMX8
#define USB_TYPEC_SEL IMX_GPIO_NR(5, 9)
static iomux_cfg_t ss_mux_gpio[] = {
SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
};
struct udevice *tcpc_i2c_dev = NULL;
static void setup_typec(void)
{
struct udevice *bus;
uint8_t chip = 0x50;
int ret;
struct gpio_desc typec_en_desc;
imx8_iomux_setup_multiple_pads(ss_mux_gpio, ARRAY_SIZE(ss_mux_gpio));
gpio_request(USB_TYPEC_SEL, "typec_sel");
ret = dm_gpio_lookup_name("gpio@1a_7", &typec_en_desc);
if (ret) {
printf("%s lookup gpio@1a_7 failed ret = %d\n", __func__, ret);
return;
}
ret = dm_gpio_request(&typec_en_desc, "typec_en");
if (ret) {
printf("%s request typec_en failed ret = %d\n", __func__, ret);
return;
}
/* Enable SS MUX */
dm_gpio_set_dir_flags(&typec_en_desc, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
ret = uclass_get_device_by_seq(UCLASS_I2C, 1, &bus);
if (ret) {
printf("%s: Can't find bus\n", __func__);
return;
}
ret = dm_i2c_probe(bus, chip, 0, &tcpc_i2c_dev);
if (ret) {
printf("%s: Can't find device id=0x%x\n",
__func__, chip);
return;
}
tcpc_init(tcpc_i2c_dev);
}
void ss_mux_select(enum typec_cc_polarity pol)
{
if (pol == TYPEC_POLARITY_CC1)
gpio_direction_output(USB_TYPEC_SEL, 0);
else
gpio_direction_output(USB_TYPEC_SEL, 1);
}
int board_usb_init(int index, enum usb_init_type init)
{
int ret = 0;
if (init == USB_INIT_HOST && tcpc_i2c_dev)
ret = tcpc_setup_dfp_mode(tcpc_i2c_dev, &ss_mux_select);
return ret;
}
int board_usb_cleanup(int index, enum usb_init_type init)
{
int ret = 0;
if (init == USB_INIT_HOST && tcpc_i2c_dev)
ret = tcpc_disable_vbus(tcpc_i2c_dev);
return ret;
}
#endif
int board_init(void)
{
#ifdef CONFIG_MXC_GPIO
@ -435,6 +517,10 @@ int board_init(void)
setup_otg();
#endif
#ifdef CONFIG_USB_XHCI_IMX8
setup_typec();
#endif
return 0;
}


+ 9
- 5
configs/imx8qxp_mek_defconfig View File

@ -17,11 +17,15 @@ CONFIG_CMD_I2C=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_CMD_USB=y
# CONFIG_USB=y
# CONFIG_DM_USB=y
# CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_IMX8=y
CONFIG_DM_USB=y
CONFIG_CMD_USB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_USB_GADGET=y


+ 11
- 1
include/configs/imx8qxp_mek.h View File

@ -259,12 +259,22 @@
#include "imx8qxp_mek_android.h"
#endif
/* USB OTG controller configs */
/* USB Config */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
/* USB 3.0 controller configs */
#ifdef CONFIG_USB_XHCI_IMX8
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/* USB OTG controller configs */
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
#endif /* CONFIG_CMD_USB */
#ifdef CONFIG_USB_GADGET
#define CONFIG_USBD_HS


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