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MLK-13440-1: fsl_usdhc: Add configuration parameter for using fixed 1.8V I/O

When using eMMC with 1.8V I/O, we have to set the VSELECT bit at this USDHC controller
setup and init. The CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT has problem that it will
apply to all USDHC controllers and it only set the 1.8V at init phase. So if user does not
select to the eMMC device, the voltage on the I/O pins are not correct.

This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg structure, so each controller
can have different settings. The default value is 0 for 3.3V, which is compatible with current
codes. When setting this value to 1, at USDHC setup and init phase the driver will set the
VSELECT bit.

Signed-off-by: Ye Li <ye.li@nxp.com>
imx_v2016.03_4.1.30_7ulp_alpha
Ye Li 4 years ago
parent
commit
ebd872f491
2 changed files with 6 additions and 0 deletions
  1. +5
    -0
      drivers/mmc/fsl_esdhc.c
  2. +1
    -0
      include/fsl_esdhc.h

+ 5
- 0
drivers/mmc/fsl_esdhc.c View File

@ -644,6 +644,9 @@ static int esdhc_init(struct mmc *mmc)
esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
#endif
if (cfg->vs18_enable)
esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
return 0;
}
@ -712,6 +715,8 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
esdhc_setbits32(&regs->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_HCKEN
| VENDORSPEC_IPGEN | VENDORSPEC_CKEN);
#endif
if (cfg->vs18_enable)
esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
writel(SDHCI_IRQ_EN_BITS, &regs->irqstaten);
memset(&cfg->cfg, 0, sizeof(cfg->cfg));


+ 1
- 0
include/fsl_esdhc.h View File

@ -182,6 +182,7 @@ struct fsl_esdhc_cfg {
u32 sdhc_clk;
u8 max_bus_width;
u8 wp_enable;
u8 vs18_enable; /*default use 1.8v if this var is not 0*/
struct mmc_config cfg;
};


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