Browse Source

MLK-13373 mx6sll: update ddr script to 2.1.1

Update ddr script to 2.1.1

Script:
http://compass.freescale.net/livelink/livelink/235732623/EVK_IMX6SLL_LPDDR3_400MHz_512MB_32bit_V2.1.1.txt?func=doc.Fetch&nodeid=235732623

Version 2.1.1:
  -Update [MMDC_MPRDDLCTL] and [MMDC_MPWRDLCTL] based on calibration results
  -setmem /32 0x021B0848 = 0x3F393B3C   // [MMDC_MPRDDLCTL] MMDC PHY Read delay-lines Configuration Register
  -setmem /32 0x021B0850 = 0x262C3826  // [MMDC_MPWRDLCTL] MMDC PHY Write delay-lines Configuration Register

Tested on two boards.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
imx_v2016.03_4.1.30_7ulp_alpha
Peng Fan 4 years ago
parent
commit
a3e5ebaa77
2 changed files with 4 additions and 4 deletions
  1. +2
    -2
      board/freescale/mx6sllevk/imximage.cfg
  2. +2
    -2
      board/freescale/mx6sllevk/plugin.S

+ 2
- 2
board/freescale/mx6sllevk/imximage.cfg View File

@ -79,8 +79,8 @@ DATA 4 0x021B001C 0x00008000
DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B085c 0x084700C7
DATA 4 0x021B0890 0x00400000
DATA 4 0x021B0848 0x3C3A3C3C
DATA 4 0x021B0850 0x24293625
DATA 4 0x021B0848 0x3F393B3C
DATA 4 0x021B0850 0x262C3826
DATA 4 0x021B081C 0x33333333
DATA 4 0x021B0820 0x33333333
DATA 4 0x021B0824 0x33333333


+ 2
- 2
board/freescale/mx6sllevk/plugin.S View File

@ -50,9 +50,9 @@
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x3C3A3C3C
ldr r1, =0x3F393B3C
str r1, [r0, #0x848]
ldr r1, =0x24293625
ldr r1, =0x262C3826
str r1, [r0, #0x850]
ldr r1, =0x33333333


Loading…
Cancel
Save